DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 166
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 166 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Error Count A Register 1 Bits 15 to 8 (FEACR[15:8]). FEACR15 is the MSB of the 16-bit Far End A
Counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Error Count A Register 2 Bits 7 to 0 (FEACR[7:0]). FEACR0 is the LSB of the 16-bit Far End A
Counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Error Count B Register 1 Bits 15 to 8 (FEBCR[15:8]). FEBCR15 is the MSB of the 16-bit Far End
Error B Counter.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Error Count B Register 2 Bits 7 to 0 (FEBCR[7:0]). FEBCR0 is the LSB of the 16-bit Far End Error B
Counter.
FEACR15
FEBCR15
FEACR7
FEBCR7
7
0
7
0
7
0
7
0
FEACR14
FEBCR14
FEACR6
FEBCR6
6
0
6
0
6
0
6
0
FEACR1
Error Count A Register 1
058h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
FEACR2
Error Count A Register 2
059h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
FEBCR1
Error Count B Register 1
05Ah + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
FEBCR2
Error Count B Register 2
05Bh + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
FEACR13
FEBCR13
FEACR5
FEBCR5
5
0
5
0
5
0
5
0
FEACR12
FEBCR12
FEACR4
FEBCR4
166 of 310
4
0
4
0
4
0
4
0
FEACR11
FEBCR11
FEACR3
FEBCR3
3
0
3
0
3
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
FEACR10
FEBCR10
FEACR2
FEBCR2
2
0
2
0
2
0
2
0
FEACR9
FEACR1
FEBCR9
FEBCR1
1
0
1
0
1
0
1
0
FEACR8
FEACR0
FEBCR8
FEBCR0
0
0
0
0
0
0
0
0
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