DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 188
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 188 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: All bits in this register are latched and can create interrupts.
Bit 7: Receive Remote Alarm Indication Condition Clear (RRAIC). Falling edge detect of RRAI. Set when a
RRAI condition has cleared.
Bit 6: Receive Alarm Indication Signal Condition Clear (RAISC). Falling edge detect of RAIS. Set when a RAIS
condition has cleared.
Bit 5: Receive Loss of Signal Condition Clear (RLOSC). Falling edge detect of RLOS. Set when an RLOS
condition has cleared.
Bit 4: Receive Loss of Frame Condition Clear (RLOFC). Falling edge detect of RLOF. Set when an RLOF
condition has cleared.
Bit 3: Receive Remote Alarm Indication Condition Detect (RRAID). Rising edge detect of RRAI. Set when a
remote alarm is received at RRINGn and RTIPn.
Bit 2: Receive Alarm Indication Signal Condition Detect (RAISD). Rising edge detect of RAIS.Set when an
unframed all-ones code is received at RRINGn and RTIPn.
Bit 1: Receive Loss of Signal Condition Detect (RLOSD). Rising edge detect of RLOS. Set when 192
consecutive zeros have been detected at RRINGn and RTIPn.
Bit 0: Receive Loss of Frame Condition Detect (RLOFD). Rising edge detect of RLOF. Set when the DS26519
has lost synchronized to the received data stream.
RRAIC
7
0
RLS1
Receive Latched Status Register 1
090h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
RAISC
6
0
RLOSC
5
0
188 of 310
RLOFC
4
0
RRAID
3
0
DS26519 16-Port T1/E1/J1 Transceiver
RAISD
2
0
RLOSD
1
0
RLOFD
0
0
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