DS26528GA4 Maxim Integrated, DS26528GA4 Datasheet - Page 143
DS26528GA4
Manufacturer Part Number
DS26528GA4
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26528GNA4.pdf
(276 pages)
Specifications of DS26528GA4
Part # Aliases
90-26528-GA4
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
This register reports the received Sa6 codeword per ETS 300 233. The bits are monitored on a submultiframe
asynchronous basis, so the pattern reported could be one of multiple patterns that would represent a valid
codeword. The table below indicates which patterns reported in this register correspond to a given valid Sa6
codeword.
Bits 3 to 0: Sa6 Codeword Bit (Sa6n).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Framer Enable (FRM_EN). This bit must be set to the desired state before writing INIT_DONE.
Bit 6: Initialization Done (INIT_DONE). The user must set this bit once he has written the configuration registers.
The host is required to write or clear all device registers prior to setting this bit. Once INIT_DONE is set, the
DS26528 will check the FRM_EN bit and, if enabled, will begin operation based on the initial configuration.
Bit 1: Soft Reset (SFTRST). Level sensitive soft reset. Should be taken high then low to reset the receiver.
Bit 0: Receiver T1/E1 Mode Select (T1/E1). Sets operating mode for receiver only! This bit must be set to the
desired state before writing INIT_DONE.
VALID Sa6 CODE
Sa6_C
Sa6_A
Sa6_E
Sa6_F
Sa6_8
0 = Framer disabled—held in low-power state
1 = Framer enabled—all features active
0 = Normal operation
1 = Reset the receiver
0 = T1 operation
1 = E1 operation
FRM_EN
—
7
0
7
0
INIT_DONE
Sa6CODE
Received Sa6 Codeword Register
06Fh + (200h x n): where n = 0 to 7, for Ports 1 to 8
RMMR
Receive Master Mode Register
080h + (200h x n): where n = 0 to 7, for Ports 1 to 8
—
6
0
POSSIBLE REPORTED
1000, 0100, 0010, 0001
1110, 0111, 1011, 1101
110, 0110, 0011, 1001
6
0
PATTERNS
1010, 0101
1111
—
5
0
—
5
0
143 of 276
—
—
4
0
4
0
Sa6n
—
3
0
3
0
DS26528 Octal T1/E1/J1 Transceiver
—
2
0
Sa6n
2
0
SFTRST
1
0
Sa6n
1
0
T1/E1
Sa6n
0
0
0
0
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