MAX6745XKVD3+T Maxim Integrated, MAX6745XKVD3+T Datasheet - Page 9

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MAX6745XKVD3+T

Manufacturer Part Number
MAX6745XKVD3+T
Description
Supervisory Circuits MCU Supervisor
Manufacturer
Maxim Integrated
Series
MAX6736, MAX6737, MAX6738, MAX6739, MAX6740, MAX6741, MAX6742, MAX6743, MAX6744, MAX6745r
Datasheet

Specifications of MAX6745XKVD3+T

Rohs
yes
Number Of Voltages Monitored
2
Monitored Voltage
1.8 V to 5 V, 0.9 V to 3.3 V
Undervoltage Threshold
1.53 V, 0.765 V
Overvoltage Threshold
1.62 V, 0.81 V
Output Type
Active Low, Push-Pull
Manual Reset
Not Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
225 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SC-70
Chip Enable Signals
No
Maximum Power Dissipation
247 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
Yes
Supply Current (typ)
5 uA, 10 uA
Supply Voltage - Min
1 V
Maxim Integrated
BARE DIE
35
20
21
38
39
1
2
3
4
5
6
16-Bit Microcontroller with Infrared Module
32 TQFN-
PIN
EP
28
18
19
31
32
1
2
3
4
5
6
44 TQFN-
EP
40
23
24
43
44
1
3
5
6
7
8
GENERAL-PURPOSE I/O AND SPECIAL FUNCTION PINS
P0.0/IRTXM/
TBA1/INT13
P0.3/INT11
P0.4/INT12
P0.5/TBA0/
HFXOUT
P0.1/RX/
P0.2/TX/
RESET
NAME
HFXIN
INT10
IRRX
IRTX
INT8
INT9
IR FUNCTION PINS
Digital, Active-Low, Reset Input/Output. The device remains in reset
as long as this pin is low and begins executing from the utility ROM at
address 8000h when this pin returns to a high state. The pin includes
pullup current source; if this pin is driven by an external device, it should
be driven by an open-drain source capable of sinking in excess of 4mA.
This pin can be left unconnected if there is no need to place the device in
a reset state using an external signal. This pin is driven low as an output
when an internal reset condition occurs.
High-Frequency Crystal Input. Connect an external crystal or resonator
between HFXIN and HFXOUT for use as the high-frequency system
clock. Alternatively, HFXIN is the input for an external, high-frequency
clock source when HFXOUT is unconnected.
IR Transmit Output. IR transmission pin capable of sinking 25mA. This
pin defaults to a high-impedance input with the weak pullup disabled
during all forms of reset. Software must configure this pin after release
from reset to remove the high-impedance input condition.
IR Receive Input. This pin defaults to a high-impedance input with the
weak pullup disabled during all forms of reset. Software must configure
this pin after release from reset to remove the high-impedance input
condition.
Port 0 General-Purpose, Digital I/O Pins. These port pins function as
general-purpose I/O pins with their input and output states controlled by
the PD0, PO0, and PI0 registers. All port pins default to high-impedance
mode after a reset. Software must configure these pins after release
from reset to remove the high-impedance condition. All alternate
functions must be enabled from software before they can be used.
CLOCK PINS
RESET PIN
GPIO PORT PIN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
Pin Description (continued)
FUNCTION
Type B Timer 0 Pin A or Type B
IR Modulator Output/INT8
USART Transmit/INT10
SPECIAL FUNCTION
USART Receive/INT9
Timer 1 Pin A/INT13
MAXQ613
INT11
INT12
9

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