71V2556S150PFG8 IDT, 71V2556S150PFG8 Datasheet
71V2556S150PFG8
Specifications of 71V2556S150PFG8
Related parts for 71V2556S150PFG8
71V2556S150PFG8 Summary of contents
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... Output enable is the only asynchronous signal and can be used to disable the outputs at any given time. A Clock Enable (CEN) pin allows operation of the IDT71V2556 to be suspended as long as necessary. All synchronous inputs are ignored when (CEN) is high and the internal device registers will hold their previous values ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs (1) Pin Definitions ...
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... NOTES (min.) = –1.0V for pulse width less than (max.) = +6.0V for pulse width less than Address D Q Control D Q Control Logic Clk Gate JTAG TDO (SA Version ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Recommended Operating Temperature and Supply Voltage ° ° ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Absolute Maximum Ratings ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Pin Configuration — 128K x 36, 119 BGA DDQ I/O 16 I/O P3 I/O I I/O DDQ 19 G I/O 20 I/O 21 I/O I DDQ DD K I/O 24 I/O 26 I/O I ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Synchronous Truth Table ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Interleaved Burst Sequence Table ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Device Operation - Showing Mixed Load, Burst, Deselect and NOOP Cycles / ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Burst Read Operation / ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Read Operation with Clock Enable Used / ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Read Operation with Chip Enable Used / ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs AC Electrical Characteristics (V = 3.3V±5%, Commercial and Industrial Temperature Ranges ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of Read Cycle Commercial and Industrial Temperature Ranges (1,2,3,4) 6.42 15 ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of Write Cycles Commercial and Industrial Temperature Ranges (1,2,3,4,5) 6.42 16 ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of Combined Read and Write Cycles Commercial and Industrial Temperature Ranges (1,2,3) 6.42 17 ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of CEN Operation Commercial and Industrial Temperature Ranges (1,2,3,4) 6.42 18 ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of CS Operation Commercial and Industrial Temperature Ranges (1,2,3,4) 6.42 19 ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs JTAG Interface Specification (SA Version only JCL TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO ( 3) TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS and TRST. 2. Device outputs = All device outputs except TDO. ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs JTAG Identification Register Definitions (SA Version only ...
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... IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Timing Waveform of OE Operation OE DATA OUT NOTE read operation is assumed progress. Ordering Information XX XXXX Device Power Speed Package Type (1) t OHZ Process/ Temperature Range ...
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... Silver Creek Valley Rd San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. ZBT and ZeroBus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola Inc. Commercial and Industrial Temperature Ranges ...