Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 153

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
Bit
Field
Default
Value
Bit
[7:3]
[2]
FE
[1]
IGADDR
[0]
WE
Byte Write
Description
Reserved
These bits are reserved and must be programmed to 00000.
Flash Error
If a Flash error is detected, this bit is set to 1.
Illegal Address
When an NVDS byte writes to invalid addresses occur (those exceeding the NVDS array size),
this bit is set to 1.
Write Error
A failure occurs during data writes to Flash. When writing data into a certain address, a read-
back operation is performed. If the read-back value is not the same as the value written, this bit
is set to 1.
7
0
To write a byte to the NVDS array, the user code must first push the address, then the data
byte onto the stack. The user code issues a
Write routine (
working register R0. The bit fields of this status byte are defined in Table 91. Additionally,
user code should pop the address and data bytes off the stack.
The write routine uses 16 bytes of stack space in addition to the two bytes of address and
data pushed by the user code. Sufficient memory must be available for this stack usage.
Because of the Flash memory architecture, NVDS writes exhibit a nonuniform execution
time. In general, a write takes 136 µs (assuming a 20 MHz system clock). For every 200
writes, however, a maintenance operation is necessary. In this rare occurrence, the write
takes up to 58 ms to complete. Slower system clock speeds result in proportionally higher
execution times.
NVDS byte writes to invalid addresses (those exceeding the NVDS array size) have no
effect. Illegal write operations have a 7 µs execution time.
6
0
0x20B3
Reserved
Table 91. Write Status Byte
). At the return from the subroutine, the write status byte resides in
5
0
4
0
CALL
3
0
instruction to the address of the Byte
FE
Z8 Encore!
2
0
Product Specification
IGADDR
NVDS Code Interface
1
0
®
F0830 Series
WE
0
0
135