Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 154

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
Bit
Field
Default
Value
Bit
[7:5]
[4]
DE
[3]
[2]
FE
[1]
IGADDR
[0]
Byte Read
Description
Reserved
These bits are reserved and must be programmed to 000.
Data Error
When reading an NVDS address, if an error is found in the latest data corresponding to this NVDS
address, this bit is set to 1. NVDS source code steps forward until it finds valid data at this address.
Reserved
This bit is reserved and must be programmed to 0.
Flash Error
If a Flash error is detected, this bit is set to 1.
Illegal Address
When NVDS byte reads from invalid addresses (those exceeding the NVDS array size) occur,
this bit is set to 1.
Reserved
This bit is reserved and must be programmed to 0.
7
0
To read a byte from the NVDS array, user code must first push the address onto the stack.
User code issues a
the return from the subroutine, the read byte resides in working register R0 and the read
status byte resides in working register R1. The bit fields of this status byte are defined in
Table 92. Additionally, the user code should pop the address byte off the stack.
The read routine uses 16 bytes of stack space in addition to the one byte of address pushed
by the user code. Sufficient memory must be available for this stack usage.
Due to the Flash memory architecture, NVDS reads exhibit a nonuniform execution time.
A read operation takes between 71 µs and 258 µs (assuming a 20 MHz system clock).
Slower system clock speeds result in proportionally higher execution times.
NVDS byte reads from invalid addresses (those exceeding the NVDS array size) return
0xff
The status byte returned by the NVDS read routine is zero for a successful read. If the sta-
tus byte is nonzero, there is a corrupted value in the NVDS array at the location being
read. In this case, the value returned in R0 is the byte most recently written to the array
that does not have an error.
. Illegal read operations have a 6 µs execution time.
Reserved
6
0
CALL
Table 92. Read Status Byte
5
0
instruction to the address of the byte-read routine (
DE
4
0
Reserved
3
0
FE
Z8 Encore!
2
0
Product Specification
IGADDR
NVDS Code Interface
1
0
®
F0830 Series
0x2000
Reserved
0
0
). At
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