Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 99

• Manufacturer Part Number: Z8F011ASH020EG2156
• Description: 8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F011ASH020EG2156

• Rohs: yes
• Core: eZ8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 1 KB
• Data Ram Size: 256 B
• On-chip Adc: No
• Package / Case: SOIC-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS025113-1212
5. Configure the associated GPIO port pin for the timer input alternate function.
6. Write to the Timer Control Register to enable the timer.
7. Assert the timer input signal to initiate the counting.
CAPTURE/COMPARE Mode
In CAPTURE/COMPARE Mode, the timer begins counting on the first external timer
input transition. The acceptable transition (rising edge or falling edge) is set by the TPOL
bit in the Timer Control Register. The timer input is the system clock.
Every subsequent acceptable transition (after the first) of the timer input signal, captures
the current count value. The capture value is written to the timer PWM High and Low
Byte registers. When the capture event occurs, an interrupt is generated, the count value in
the Timer High and Low Byte registers is reset to
INPCAP bit in the TxCTL1 Register is set to indicate that the timer interrupt is caused by
an input capture event.
If no capture event occurs, the timer counts up to the 16-bit compare value stored in the
Timer Reload High and Low Byte registers. Upon reaching the compare value, the timer
generates an interrupt, the count value in the Timer High and Low Byte registers is reset to
0001H
cate that the timer interrupt has not been caused by an input capture event.
Observe the following steps for configuring a timer for CAPTURE/COMPARE Mode and
for initiating the count:
1. Write to the Timer Control Register to:
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
3. Write to the Timer Reload High and Low Byte registers to set the compare value.
4. Enable the timer interrupt and set the timer interrupt priority by writing to the relevant
5. Configure the associated GPIO port pin for the timer input alternate function.
tion and reload events. The user can configure the timer interrupt to be generated only
at the input deassertion event or the reload event by setting the TICONFIG field of the
TxCTL1 Register.
–
–
–
–
cally
interrupt registers.By default, the timer interrupt are generated for both input capture
and Reload events. The user can configure the timer interrupt to be generated only at
the input capture event or the reload event by setting TICONFIG field of the TxCTL1
Register.
and counting resumes. The INPCAP bit in the TxCTL1 Register is cleared to indi-
Disable the timer
Configure the timer for CAPTURE/COMPARE Mode.
Set the prescale value.
Set the capture edge (rising or falling) for the timer input.
0001H
).
0001H
and the counting resumes. The
Z8 Encore!
Product Specification
®
F0830 Series
Operation
81