CY7C1370D-200BGXC Cypress Semiconductor Corp, CY7C1370D-200BGXC Datasheet - Page 14
![IC SRAM 18MBIT 200MHZ 119BGA](/photos/28/21/282110/119-bga_sml.jpg)
CY7C1370D-200BGXC
Manufacturer Part Number
CY7C1370D-200BGXC
Description
IC SRAM 18MBIT 200MHZ 119BGA
Manufacturer
Cypress Semiconductor Corp
Type
Synchronousr
Specifications of CY7C1370D-200BGXC
Memory Size
18M (512K x 36)
Package / Case
119-BGA
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Speed
200MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Access Time
3 ns
Maximum Clock Frequency
200 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3.135 V
Maximum Operating Current
300 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Ports
4
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1370D-200BGXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
TAP AC Switching Characteristics
Over the Operating Range
Document Number: 38-05558 Rev. *H
Clock
t
t
t
t
Output Times
t
t
Set-up Times
t
t
t
Hold Times
t
t
t
Notes
Parameter
TCYC
TF
TH
TL
TDOV
TDOX
TMSS
TDIS
CS
TMSH
TDIH
CH
9. t
10. Test conditions are specified using the load in TAP AC test Conditions. t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
TCK clock cycle time
TCK clock frequency
TCK clock HIGH time
TCK clock LOW time
TCK clock LOW to TDO valid
TCK clock LOW to TDO invalid
TMS set-up to TCK clock rise
TDI set-up to TCK clock rise
Capture set-up to TCK rise
TMS hold after TCK clock rise
TDI hold after clock rise
Capture hold after clock rise
[9, 10]
Description
R
/t
F
= 1 ns.
Min
50
20
20
–
–
0
5
5
5
5
5
5
CY7C1370DV25
CY7C1372DV25
Max
20
10
–
–
–
–
–
–
–
–
–
–
Page 14 of 29
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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