ZLF645S2864GP0001 Maxim Integrated, ZLF645S2864GP0001 Datasheet - Page 58
ZLF645S2864GP0001
Manufacturer Part Number
ZLF645S2864GP0001
Description
8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
Manufacturer
Maxim Integrated
Datasheet
1.ZLF645E0H4864G2204.pdf
(201 pages)
Specifications of ZLF645S2864GP0001
Core
Z8
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
64 KB
Data Ram Size
1 KB
Operating Supply Voltage
2 V to 3.6 V
Interface Type
UART
Number Of Programmable I/os
5
Number Of Timers
2 x 8 bit, 1 x 16 bit
Processor Series
ZLF645
Program Memory Type
Flash
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Register File Summary
19-4572; Rev 0; 4/09
Table 26. Register File Address Summary
12-Bit
000
001
002
003
004
005–00F 0
010–0EF 0,D,F 10–EF General-Purpose Registers
0F0
0F1
0F2
0F3
0F4
0F5
0F6
0F7
0F8
Address (Hex)
Bank 8-Bit
0–3
0–3
0–3
0–3
0–3
All
All
All
All
All
All
All
All
All
Table 26
and reset value. The table also lists the register bank (or banks) and corresponding 8-bit
address (if any) for each register and a page link to the detailed register table.
Throughout this document, an ‘X’ denotes an undefined digit. A ‘—’ (dash) in a table cell
indicates that the corresponding attribute does not apply to the listed item. Reset value dig-
its (highlighted in grey) are not reset by a Stop Mode Recovery. Register bit SMR[7]
(shown in boldface) is set to 1 instead of reset by a Stop Mode recovery.
00
01
02
03
04
05–0F General-Purpose Registers
F0
F1
F2
F3
F4
F5
F6
F7
F8
lists each linear (12-bit) register file address to the associated register, mnemonic,
Register Description
Port 0 Register
Port 1 Register
Port 2 Register
Port 3 Register
Port 4 Register
(Bank 0 Only)
(Banks 0, D, F)
Reserved
UART Receive/Transmit Data Register URDATA/
UART Status Register
UART Control Register
UART Baud Rate Generator Constant
Register
Reserved
Port 2 Mode Register
Port 3 Mode Register
Port 0/1 Mode Register
Mnemonic
P0
P1
P2
P3
P4
—
—
—
UTDATA
UST
UCTL
BCNST
—
P2M
P3M
P01M
ZLF645 Series Flash MCUs
Product Specification
Reset
XXh
XXh
XXh
0Xh
XXh
XXh
XXh
—
XXh
0 0 0 0 _0 0 1 0 b
00h
FFh
—
FFh
XXXX_X0 0 0 b
X1 XX_1 XX1 b
Register File Summary
Page
No
32
33
35
37
37
95
95
97
98
34
36
31
—
—
—
—
50
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