C8051F314R Silicon Labs, C8051F314R Datasheet - Page 193

• Manufacturer Part Number: C8051F314R
• Description: 8-bit Microcontrollers - MCU 8KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F314R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 1.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: LQFP-32
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 17
• Data Rom Size: 128 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 29
• Number Of Timers: 5
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bits1–0: SCA1-SCA0: Timer 0/1 Prescale Bits.
T3MH
R/W
Bit7
T3MH: Timer 3 High Byte Clock Select.
This bit selects the clock supplied to the Timer 3 high byte if Timer 3 is configured in split 8-
bit timer mode. T3MH is ignored if Timer 3 is in any other mode.
0: Timer 3 high byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 high byte uses the system clock.
T3ML: Timer 3 Low Byte Clock Select.
This bit selects the clock supplied to Timer 3. If Timer 3 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 3 low byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 low byte uses the system clock.
T2MH: Timer 2 High Byte Clock Select.
This bit selects the clock supplied to the Timer 2 high byte if Timer 2 is configured in split 8-
bit timer mode. T2MH is ignored if Timer 2 is in any other mode.
0: Timer 2 high byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 high byte uses the system clock.
T2ML: Timer 2 Low Byte Clock Select.
This bit selects the clock supplied to Timer 2. If Timer 2 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 2 low byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 low byte uses the system clock.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1. T1M is ignored when C/T1 is set to logic 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0. T0M is ignored when C/T0 is set to
logic 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Counter/Timer 0 uses the system clock.
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
Note: External clock divided by 8 is synchronized with the system clock, and the external
T3ML
SCA1
R/W
Bit6
clock must be less than or equal to the system clock to operate in this mode.
0
0
1
1
SFR Definition 17.3. CKCON: Clock Control
T2MH
R/W
Bit5
SCA0
0
1
0
1
T2ML
R/W
Bit4
Rev. 1.7
T1M
R/W
Bit3
C8051F310/1/2/3/4/5/6/7
System clock divided by 12
System clock divided by 48
External clock divided by 8
System clock divided by 4
T0M
Prescaled Clock
R/W
Bit2
SCA1
R/W
Bit1
SCA0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8E
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