24LC025-I/ST Microchip Technology, 24LC025-I/ST Datasheet - Page 9
![IC EEPROM 2KBIT 400KHZ 8TSSOP](/photos/6/59/65937/c04-086_st_sml.jpg)
24LC025-I/ST
Manufacturer Part Number
24LC025-I/ST
Description
IC EEPROM 2KBIT 400KHZ 8TSSOP
Manufacturer
Microchip Technology
Specifications of 24LC025-I/ST
Memory Size
2K (256 x 8)
Package / Case
8-TSSOP
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
24LC025I/ST
8.0
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
The 24AA024/24LC024/24AA025/24LC025 contains
an address counter that maintains the address of the
last word accessed, internally incremented by one.
Therefore, if the previous read access was to address
n, the next current address read operation would
access data from address n + 1. Upon receipt of the
slave address with the R/W bit set to ‘1’, the 24AA024/
24LC024/24AA025/24LC025 issues an acknowledge
and transmits the 8-bit data word. The master will not
acknowledge the transfer but does generate a Stop
condition
24LC025 discontinues transmission (Figure 8-1).
8.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24AA024/24LC024/24AA025/24LC025
as part of a write operation. Once the word address is
FIGURE 8-1:
2004 Microchip Technology Inc.
READ OPERATIONS
Current Address Read
Random Read
and
the
24AA024/24LC024/24AA025/24LC025
CURRENT ADDRESS READ
24AA024/24LC024/24AA025/
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
S
CONTROL
BYTE
sent, the master generates a Start condition following
the acknowledge. This terminates the write operation,
but not before the internal address pointer is set. The
master then issues the control byte again, but with the
R/W bit set to a ‘1’. The 24AA024/24LC024/24AA025/
24LC025 will then issue an acknowledge and transmits
the eight bit data word. The master will not acknowl-
edge the transfer but does generate a Stop condition
and the 24AA024/24LC024/24AA025/24LC025 dis-
continues transmission (Figure 8-2). After this com-
mand, the internal address counter will point to the
address location following the one that was just read.
8.3
Sequential reads are initiated in the same way as a
random read except that after the 24AA024/24LC024/
24AA025/24LC025 transmits the first data byte, the
master issues an acknowledge (as opposed to a Stop
condition in a random read). This directs the 24AA024/
24LC024/24AA025/24LC025 to transmit the next
sequentially-addressed 8-bit word (Figure 8-3).
To provide sequential reads, the 24AA024/24LC024/
24AA025/24LC025 contains an internal address
pointer that is incremented by one upon completion of
each operation. This address pointer allows the entire
memory contents to be serially read during one
operation.
automatically roll over from address 0FFh to address
000h.
C
A
K
DATA
Sequential Read
The
O
N
N
A
C
K
O
S
T
P
P
internal
address
DS21210G-page 9
pointer
will