25LC320-I/SN Microchip Technology, 25LC320-I/SN Datasheet - Page 10
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25LC320-I/SN
Manufacturer Part Number
25LC320-I/SN
Description
IC EEPROM 32KBIT 2MHZ 8SOIC
Manufacturer
Microchip Technology
Specifications of 25LC320-I/SN
Memory Size
32K (4K x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
4 K x 8
Interface Type
SPI
Maximum Clock Frequency
2 MHz
Access Time
230 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
25LC320-I/SN
Manufacturer:
MCP
Quantity:
32 150
Company:
Part Number:
25LC320-I/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
25LC320-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
25LC320-I/SN-G
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
25LC320-I/SN-G-PW819T
Manufacturer:
MICROCHI
Quantity:
20 000
25AA320/25LC320/25C320
3.5
The Read Status Register instruction (RDSR) provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
The Write-In-Process (WIP) bit indicates whether the
25XX320 is busy with a write operation. When set to a
‘
in progress. This bit is read-only.
FIGURE 3-6:
DS21227E-page 10
1
WPEN
’, a write is in progress; when set to a ‘
SCK
SO
CS
7
SI
Read Status Register Instruction
(RDSR)
X
6
5
X
0
0
READ STATUS REGISTER TIMING SEQUENCE
4
X
0
1
BP1
High-impedance
3
0
instruction
2
BP0
2
0
3
0
WEL
4
0
1
’, no write is
1
5
WIP
0
0
6
1
7
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘
allows writes to the array, when set to a ‘
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI commands
regardless of the state of write protection on the Status
register. This bit is read-only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for the RDSR timing sequence.
7
8
6
9
data from Status register
10
5
11
4
12
3
2004 Microchip Technology Inc.
13
2
14
1
15
0
1
0
’, the latch
’, the latch