25LC320-I/SN Microchip Technology, 25LC320-I/SN Datasheet - Page 12
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25LC320-I/SN
Manufacturer Part Number
25LC320-I/SN
Description
IC EEPROM 32KBIT 2MHZ 8SOIC
Manufacturer
Microchip Technology
Specifications of 25LC320-I/SN
Memory Size
32K (4K x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
4 K x 8
Interface Type
SPI
Maximum Clock Frequency
2 MHz
Access Time
230 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
25LC320-I/SN
Manufacturer:
MCP
Quantity:
32 150
Company:
Part Number:
25LC320-I/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
25LC320-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
25LC320-I/SN-G
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
25LC320-I/SN-G-PW819T
Manufacturer:
MICROCHI
Quantity:
20 000
25AA320/25LC320/25C320
3.7
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A WRITE ENABLE instruction must be issued to
• After a byte write, page write or Status register
• CS must be set high after the proper number of
• Access to the array during an internal write cycle
TABLE 3-3:
DS21227E-page 12
set the write enable latch
write, the write enable latch is reset
clock cycles to start an internal write cycle
is ignored and programming is continued
WPEN
x
0
1
x
Data Protection
WRITE-PROTECT FUNCTIONALITY MATRIX
High
Low
WP
x
x
WEL
0
1
1
1
Protected Blocks
Protected
Protected
Protected
Protected
3.8
The 25XX320 powers on in the following state:
• The device is in low-power Standby mode
• The write enable latch is reset
• SO is in high-impedance state
• A low level on CS is required to enter active state
.
(CS =
1
Unprotected Blocks
Power-On State
)
Protected
Writable
Writable
Writable
2004 Microchip Technology Inc.
Status Register
Protected
Protected
Writable
Writable