M95640-RMB6TG STMicroelectronics, M95640-RMB6TG Datasheet - Page 16
![IC EEPROM 64KBIT 2MHZ 8MLP](/photos/14/26/142612/stm_ufdfpn8_sml.jpg)
M95640-RMB6TG
Manufacturer Part Number
M95640-RMB6TG
Description
IC EEPROM 64KBIT 2MHZ 8MLP
Manufacturer
STMicroelectronics
Specifications of M95640-RMB6TG
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MLP
Memory Configuration
8192 X 8
Interface Type
Serial, SPI
Clock Frequency
2MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
DFN
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M95640-RMB6TGCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95640-RMB6TG
Manufacturer:
ST
Quantity:
20 000
Instructions
6
6.1
16/44
Instructions
Each instruction starts with a single-byte code, as summarized in
If an invalid instruction is sent (one not contained in <Blue>Table 3.), the device
automatically deselects itself.
Table 3.
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven
high.
Figure 7.
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruction
Instruction set
Figure
Write Enable (WREN) sequence
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
S
C
D
Q
7, to send this instruction to the device, Chip Select (S) is driven low,
Doc ID 5711 Rev 12
High Impedance
Description
0
1
2
Instruction
3
4
5
6
7
M95320, M95320-W, M95320-R
AI02281E
Table
Instruction format
3.
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010