MT46V32M4P-6T:D TR Micron Technology Inc, MT46V32M4P-6T:D TR Datasheet - Page 24
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MT46V32M4P-6T:D TR
Manufacturer Part Number
MT46V32M4P-6T:D TR
Description
IC DDR SDRAM 128MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT46V16M8TG-6T_LD_TR.pdf
(81 pages)
Specifications of MT46V32M4P-6T:D TR
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (32Mx4)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 20:
PDF: 09005aef816fd013/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 128Mb DDR: Rev. F; Core DDR: Rev. A 4/07 EN
AC Characteristics
Parameter
Access window of DQ from CK/CK#
CK high-level width
Clock cycle time
CK low-level width
DQ and DM input hold time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS–DQ skew, DQS to last DQ valid, per group, per access
WRITE command-to-first DQS latching transition
DQ and DM input setup time relative to DQS
DQS falling edge from CK rising – hold time
DQS falling edge to CK rising – setup time
Half-clock period
Data-out High-Z window from CK/CK#
Address and control input hold time (fast slew rate)
Address and control input hold time (slow slew rate)
Address and control input pulse width (for each input)
Address and control input setup time (fast slew rate)
Address and control input setup time (slow slew rate)
Data-out Low-Z window from CK/CK#
LOAD MODE REGISTER command cycle time
DQ–DQS hold, DQS to first DQ to go non-valid, per access
Data hold skew factor
ACTIVE-to-READ with auto precharge command
ACTIVE-to-PRECHARGE command
ACTIVE-to-ACTIVE/AUTO REFRESH command period
ACTIVE-to-READ or WRITE delay
REFRESH-to-REFRESH command interval
Average periodic refresh interval
AUTO REFRESH command period
Electrical Characteristics and Recommended AC Operating Conditions (-75Z, -75)
Notes: 1–6, 15–18, 34 apply to entire table; Notes appear on pages 26–32;
0°C ≤ T
A
≤ +70°C; V
DD
Q = +2.5V ±0.2V, V
CL = 2.5
CL = 2
128Mb
256Mb,
512Mb,
1Gb
128Mb
256Mb,
512Mb,
1Gb
128Mb,
256Mb,
512Mb
1Gb
DD
= +2.5V ±0.2V
t
Symbol
24
t
CK (2.5)
t
t
t
DQSCK
t
t
t
t
t
t
CK (2)
DQSH
DQSQ
DIPW
t
t
t
t
t
DQSL
DQSS
t
t
t
t
t
t
MRD
REFC
REFC
t
t
t
t
t
t
DSH
t
t
QHS
RCD
REFI
REFI
t
IPW
t
t
RAP
RAS
t
t
DSS
t
RFC
RFC
DH
IH
IH
QH
AC
CH
HP
HZ
DS
IS
IS
RC
CL
LZ
F
S
F
S
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CH,
–0.75
–0.75
–0.75
t
t
Min
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
QHS
Electrical Specifications – DC and AC
HP -
7.5
7.5
0.5
0.5
0.2
0.2
2.2
15
20
40
65
20
75
1
1
–
–
–
–
–
–
–
–
t
CL
-75Z
128Mb: x4, x8, x16 DDR SDRAM
120,000
+0.75
+0.75
+0.75
140.6
Max
0.55
0.55
1.25
0.75
70.3
15.6
0.5
7.8
13
13
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
t
CH,
–0.75
–0.75
–0.75
t
t
Min
0.45
0.45
1.75
0.35
0.35
0.75
0.90
0.90
QHS
120
HP -
0.5
0.5
7.5
0.2
0.2
2.2
10
15
20
40
65
20
75
–
–
1
1
–
–
–
–
–
t
CL
-75
©2004 Micron Technology, Inc. All rights reserved.
120,000
+0.75
+0.75
+0.75
140.6
Max
0.55
0.55
1.25
0.75
70.3
15.6
0.5
7.8
13
13
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Units
t
t
t
t
t
t
t
ns
CK
ns
ns
CK
ns
ns
ns
CK
CK
ns
CK
ns
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
Notes
27, 32
26, 27
27, 32
19, 43
26, 27
19, 43
31
46
46
31
32
35
15
15
36
24
24
24
24
50
50