MT47H32M16BN-5E:D TR Micron Technology Inc, MT47H32M16BN-5E:D TR Datasheet - Page 114
![IC DDR2 SDRAM 512MBIT 5NS 84FBGA](/photos/7/23/72318/mfg557-84-fbga_sml.jpg)
MT47H32M16BN-5E:D TR
Manufacturer Part Number
MT47H32M16BN-5E:D TR
Description
IC DDR2 SDRAM 512MBIT 5NS 84FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M4BT-37EA_TR.pdf
(129 pages)
Specifications of MT47H32M16BN-5E:D TR
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1214-2
MT47H32M16BN-5E:D TR
MT47H32M16BN-5E:D TR
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Figure 68: Power-Down
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. O 7/09 EN
DQS, DQS#
Command
Address
CK#
CKE
DM
DQ
CK
Valid 1
Valid
T1
Notes:
t CK
power-down
mode 6
Enter
1. If this command is a PRECHARGE (or if the device is already in the idle state), then the
2.
3.
4.
5.
6. No column accesses are allowed to be in progress at the time power-down is entered. If
NOP
T2
power-down mode shown is precharge power-down. If this command is an ACTIVATE
(or if at least one row is already active), then the power-down mode shown is active power-
down.
t
clock edges. CKE must remain at the valid input level the entire time it takes to achieve
the three clocks of registration. Thus, after any CKE transition, CKE may not transition
from its valid level during the time period of
during its
t
READ command.
t
ted via MR (bit 12 = 0).
t
ted via MR (bit 12 = 1).
the DLL was not in a locked state when CKE went LOW, the DLL must be reset after
exiting power-down mode for proper READ operation.
t CH
CKE (MIN) of three clocks means CKE must be registered on three consecutive positive
XP timing is used for exit precharge power-down and active power-down to any non-
XARD timing is used for exit active power-down to READ command if fast exit is selec-
XARDS timing is used for exit active power-down to READ command if slow exit is selec-
t CL
t
IS and
T3
t CKE (MIN) 2
t
IH window.
T4
114
t IH
power-down
t IS
Micron Technology, Inc. reserves the right to change products or specifications without notice.
mode
NOP
Exit
T5
512Mb: x4, x8, x16 DDR2 SDRAM
t
IS + 2 ×
t XP 3 , t XARD 4
t XARDS 5
NOP
T6
t
t CKE (MIN) 2
CK +
t
IH. CKE must not transition
Power-Down Mode
©2004 Micron Technology, Inc. All rights reserved.
Valid
Valid
T7
t IH
Don’t Care
Valid
Valid
T8
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