MT46H8M32LFB5-6 IT:A TR Micron Technology Inc, MT46H8M32LFB5-6 IT:A TR Datasheet - Page 78
![IC DDR SDRAM 256MBIT 90VFBGA](/photos/7/23/72313/mfg557-90-vfbga_sml.jpg)
MT46H8M32LFB5-6 IT:A TR
Manufacturer Part Number
MT46H8M32LFB5-6 IT:A TR
Description
IC DDR SDRAM 256MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Specifications of MT46H8M32LFB5-6 IT:A TR
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (8Mx32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
90-VFBGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1279-2
MT46H8M32LFB5-6 IT:A TR
MT46H8M32LFB5-6 IT:A TR
Figure 41: WRITE-to-PRECHARGE – Uninterrupting
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DQ
DQ
DQ
DM
DM
DM
CK
1
6
6
6
WRITE
Bank a,
Col b
T0
Notes:
2,4
t
DQSS
t
DQSS
t
DQSS
1. An uninterrupted burst 4 of is shown.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4. The PRECHARGE and WRITE commands are to the same device. However, the PRE-
5.
6. D
D
IN
CHARGE and WRITE commands can be to different devices; in this case,
required and the PRECHARGE command can be applied earlier.
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
D
IN
T1
IN
b = data-in for column b.
D
D
IN
IN
T1n
D
IN
D
D
IN
IN
NOP
D
T2
IN
D
D
IN
IN
T2n
D
IN
78
D
IN
NOP
T3
256Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
NOP
WR
T4
5
Don’t Care
(a or all)
PRE
T5
Bank
3,4
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
Transitioning Data
t
WR is not
T6
NOP