AT17C65A-10JC Atmel, AT17C65A-10JC Datasheet - Page 6

• Manufacturer Part Number: AT17C65A-10JC
• Description: IC SER CONFIG PROM 65K 20PLCC
• Manufacturer: Atmel

Specifications of AT17C65A-10JC

• Programmable Type: Serial EEPROM
• Memory Size: 64kb
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT17C65A10JC

Pin Configurations
6
20 PLCC
Pin
10
12
18
20
2
4
8
9
AT17C/LV65A/128A/256A
Name
DATA
DCLK
OE
WP
nCS
GND
nCASC
A2
SER_EN
VCC
I/O
I/O
O
I
I
I
I
I
I
Description
Three-state DATA output for configuration. Open-collector bi-directional pin for programming.
Clock input. Used to increment the internal address and bit counter for reading and programming.
Output enable (active High) and reset (active Low) when SER_EN is High. A Low logic level resets
the address counter. A High logic level (with nCS Low) enables DATA and permits the address
counter to count. The logic polarity of OE is programmable and must be set active High (RESET
active Low) by the user during programming for Altera applications.
Write Protect (WP) input (when nCS is Low) during programming only (i.e., when SER_EN is Low).
When WP is Low, the entire memory can be written. When WP is enabled (High), the lowest block of
the memory cannot be written. This function is not available during FPGA loading operations. Please
refer to the “Programming Specification for Atmel’s Configuration EEPROM” application note for
more details.
Chip select input (active Low). A Low input (with OE active) allows DCLK to increment the address
counter and enables DATA to drive out. A High level on nCS disables both the address and bit
counters and forces the device into a low-power standby mode. Note that this pin will not
enable/disable the device in the 2-wire Serial Programming Mode (i.e., when SER_EN is Low).
Ground pin. A 0.2 µF decoupling capacitor should be placed between the VCC and GND pins.
Cascade select output (active Low). This output goes Low when the address counter has reached its
maximum value. In a daisy-chain of AT17A Series devices, the nCASC pin of one device must be
connected to the nCS input pin of the next device in the chain. It will stay Low as long as nCS is Low
and OE is High. It will then follow nCS until OE goes Low, thereafter, nCASC will stay High until the
entire EEPROM is read again.
Device selection input, A2. This is used to enable (or select) the device during programming (i.e.,
when SER_EN is Low; please refer to the “Programming Specification for Atmel’s Configuration
EEPROM” application note for more details).
Serial enable must be held High during FPGA loading operations. Bringing SER_EN Low enables
the 2-wire Serial Programming Mode.
+3.3V/+5V Power Supply Pin.
0996D–08/01