MAX6955ATL+ Maxim Integrated Products, MAX6955ATL+ Datasheet - Page 32
![IC DRVR DSPL LED 40-TQFN](/photos/6/65/66502/40-qfn_pkg_sml.jpg)
MAX6955ATL+
Manufacturer Part Number
MAX6955ATL+
Description
IC DRVR DSPL LED 40-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6955AAX.pdf
(43 pages)
Specifications of MAX6955ATL+
Display Type
LED
Configuration
7, 14, 16 Segment
Interface
I²C
Current - Supply
22mA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Number Of Digits
16
Number Of Segments
128
Low Level Output Current
935 mA
High Level Output Current
55 mA
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Supply Current
30 mA
Maximum Power Dissipation
2051.3 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
Details
2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 38. Slot 1 Configuration
* 7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11).
** The highlighted row is used in Typical Operating Circuit 1 for display digits 0 and 1.
32
C o m m o n - C a t h o d e
C O N F I G U R A T IO N
D r i v e : D ig it Ty p e
CODE (HEX)
ADDRESS
______________________________________________________________________________________
C H O IC E
010
011
012
013
014
015
016
017
018
00
01
02
03
04
05
06
07
08
09
D7
D6
D5
D4
D3
D2
D1
D0
CC0
dp
a1
a2
d1
d2
g1
g2
—
m
b
c
e
h
k
f
i
j
l
CC1
dp
a1
a2
d1
d2
g1
g2
—
m
b
c
e
h
k
f
i
j
l
0
0
CC0
CC1
1dp
2dp
1b
1d
1g
2b
2d
2g
1a
—
1c
1e
2a
2c
2e
1f
2f
CC0
CC1
d1
d2
g1
g2
dp
a1
a2
m
b
c
e
h
k
f
i
j
l
CC0
dp
a1
a2
d1
d2
g1
g2
—
m
b
c
e
h
k
f
i
j
l
See Table 41.
See Table 40.
See Table 39.
0x0C
CC0
1dp
2dp
1a
1b
1c
1d
1e
1g
2a
2b
2c
2d
2e
2g
—
—
1f
2f
1
0
CC1
g1
g2
dp
—
—
—
m
b
d
a
c
e
h
k
f
i
j
l
CC0
g1
g2
dp
—
—
—
m
b
d
a
c
e
h
k
f
i
j
l
CC1
dp
a1
a2
d1
d2
g1
g2
—
m
b
c
e
h
k
0
1
f
i
j
l
CC1
1dp
2dp
1a
1b
1c
1d
1e
1g
2a
2b
2c
2d
2e
2g
—
—
1f
2f
CC0
CC1
dp
g1
g2
—
—
m
b
d
a
c
e
h
k
1
1
f
i
l
l