MIC2583-JYQS TR Micrel Inc, MIC2583-JYQS TR Datasheet - Page 14
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MIC2583-JYQS TR
Manufacturer Part Number
MIC2583-JYQS TR
Description
IC CTRLR HOT SWAP 100MV 16-QSOP
Manufacturer
Micrel Inc
Type
Hot-Swap Controllerr
Datasheet
1.MIC2582-JYM.pdf
(25 pages)
Specifications of MIC2583-JYQS TR
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
2.3 V ~ 13.2 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SSOP (0.150", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MIC2583-JYQSTR
MIC2583-JYQSTR
MIC2583-JYQSTR
following equation:
where I
Consequently, the value of C
ensure that the overcurrent response time, t
exceeds the time needed for the output to reach its final
value. For example, given a MOSFET with an input
capacitance C
and I
capacitance dominates as determined by the calculated
INRUSH > I
determined from Equation 4 is:
Output Voltage Slew Rate, dV
and the resulting t
output is approximately 4.5ms. (See Power-On Reset
and Overcurrent Timer Delays section to calculate
t
GATE Capacitance Dominated Start-Up
In this case, the value of the load capacitance relative to
the GATE capacitance is small enough such that the
load current during start-up never exceeds the current
limit threshold as determined by Equation 3. The
minimum value of C
limit is never exceeded is given by the equation below:
where C
capacitance (C
capacitor connected to the GATE pin of the MIC2582/83
to ground. Once C
equation to determine the output slew rate for gate
capacitance dominated start-up.
Table 1 depicts the output slew rate for various values of
C
OCSLOW
Micrel, Inc.
April 2009
GATE
Output Voltage Slew Rate, dV
dV
C
GATE
OUT
LIM
.
Table 1. Output Slew Rate Selection for GATE
).
/dt =
LIM
(min)
GATE
is set to 6A with a 12V input, then the load
0.001µF
LIM
0.01µF
Capacitance Dominated Start-Up
is the programmed current limit value.
C
0.1µF
C
I
1µF
is the summation of the MOSFET input
GATE
ISS
GATE
=
. Therefore, the output voltage slew rate
GATE
ISS
I
I
GATE
= C
LIM
) and the value of the external
GATE
OCSLOW
GATE
I
GATE
GATE
×
is determined, use the following
C
that will ensure that the current
= 17µA
LOAD
OUT
= 4700pF, C
needed to achieve a 12V
/dt =
FILTER
OUT
2200
0.017V/ms
/dt =
0.17V/ms
dV
must be selected to
1.7V/ms
17V/ms
6
A
OUT
μ
LOAD
F
C
/dt
I
LOAD
LIM
=
. 2
is 2200µF,
73
ms
OCSLOW
V
(6)
(5)
(4)
,
14
Current Limiting and Dual-Level Circuit Breaker
Many applications will require that the inrush and steady
state supply current be limited at a specific value in order
to protect critical components within the system.
Connecting a sense resistor between the VCC and
SENSE pins sets the nominal current limit value of the
MIC2582/83 and the current limit is calculated using
Equation 2.
The MIC2582/83 also features a dual-level circuit
breaker triggered via 50mV and 100mV current-limit
thresholds sensed across the VCC and SENSE pins.
The first level of the circuit breaker functions as follows.
For the MIC2583/83R, once the voltage sensed across
these two pins exceeds 50mV, the overcurrent timer, its
duration set by capacitor C
voltage at C
If the voltage at C
threshold (V
returns to ground as the circuit breaker trips and the
GATE output is immediately shut down. The default
overcurrent time period for the MIC2582/83 is 5µs. For
the second level, if the voltage sensed across VCC and
SENSE exceeds 100mV at any time, the circuit breaker
trips and the GATE shuts down immediately, bypassing
the overcurrent time period. The MIC2582-MYM option
is equipped with only a single circuit breaker threshold
(50mV). To disable current limit and circuit breaker
operation, tie the SENSE and VCC pins together and the
C
Output Undervoltage Detection
The MIC2582/83 employ output undervoltage detection
by monitoring the output voltage through a resistive
divider connected at the FB pin. During turn on, while the
voltage at the FB pin is below the threshold (V
/POR pin is asserted low.
Once the FB pin voltage crosses V
source charges capacitor C
voltage reaches 1.24V, the time period t
the CPOR pin is pulled to ground and the /POR pin goes
HIGH. If the voltage at FB drops below V
10µs, the /POR pin resets for at least one timing cycle
defined by t
example).
Power-On Reset and Overcurrent Timer Delays
The Power-On Reset delay, t
the /POR pin to go HIGH once the voltage at the FB pin
exceeds the power-good threshold (V
connected to CPOR sets the interval and is determined
by using Equation 1 with V
resulting equation becomes:
where the Power-On Reset threshold (V
FILTER
t
POR
(MIC2583/83R) pin to ground.
=
C
POR
FILTER
POR
TH
×
) of 1.24V, then C
I
V
using a 6.5µA constant current source.
(See Applications Information for an
CPOR
TH
FILTER
≅
0
reaches the overcurrent timer
5 .
TH
×
POR
FILTER
substituted for V
POR
C
POR
. Once the CPOR pin
, is the time period for
, starts to ramp the
( )
MIC2582/MIC2583
FB
μ
FILTER
F
, a 2.5µA current
M9999-043009-C
FB
FB
POR
). A capacitor
TH
for more than
immediately
) and timer
elapses as
START
FB
), the
. The
(7)