HCPL-316J-500E Avago Technologies US Inc., HCPL-316J-500E Datasheet - Page 31

• Manufacturer Part Number: HCPL-316J-500E
• Description: OPTOCOUPLER 2CH 2.5A 16-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-316J-500E

• Configuration: High-Side
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Input Type: Differential
• Delay Time: 300ns
• Current - Peak: 2.5A
• Number Of Configurations: 1
• Number Of Outputs: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Fall Time: 0.1 us
• Rise Time: 0.1 us
• Isolation Voltage: 3750 Vrms
• Maximum Power Dissipation: 1200 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 516-1777-2; HCPL-316J-500E

Thermal Model
The HCPL-316J is designed to dissipate the majority of
the heat through pins 4 for the input IC and pins 9 and 10
for the output IC. (There are two V
side, pins 9 and 10, for this purpose.) Heat flow through
other pins or through the package directly into ambient
are considered negligible and not modeled here.
In order to achieve the power dissipation specified in
the absolute maximum specification, it is imperative
that pins 4, 9, and 10 have ground planes connected to
them. As long as the maximum power specification is
not exceeded, the only other limita tion to the amount
of power one can dissipate is the absolute maximum
junction temperature specification of 125°C. The junc-
tion temperatures can be calculated with the following
equations:
T
T
where P
put IC. Since T
and airflow, their exact number may not be available.
Therefore, a more accurate method of calcu lat ing the
junction temperature is with the following equations:
T
T
These equations, however, require that the pin 4 and pins
9, 10 temperatures be measured with a thermal couple
on the pin at the HCPL-316J package edge.
Figure 78. HCPL-316J thermal model.
31
ji
jo
ji
jo
θ
θ
= P
= P
= P
= P
4A
i4
= 60°C/W
= 50°C/W*
i
i
T
o
o
(T
T
i4
(T
i
i4
o9,10
= power into input IC and P
+ T
o9,10
+ T
T
P4
T
P4
+ T
4A
ji
4A
+ T
) + T
P9,10
and T
9,10A
T
A
A
) + T
T
9,10A
P9,10
T
jo
θ
A
9,10A
θ
are dependent on PCB layout
O9,10
= 50°C/W*
= 30°C/W
EE
o
pins on the output
= power into out-
T
T
T
T
T
T
T
T
*The T
in Figure 78 with reasonable air flow. This value may increase or
decrease by a factor of 2 depending on PCB layout and/or airflow.
ji
jo
P4
P9,10
I4
I9,10
4A
9,10A
= junction temperature of input side IC
= junction temperature of output side IC
= input side IC to pin 4 thermal resistance
= pin 4 temperature at package edge
= pin 4 to ambient thermal resistance
= output side IC to pin 9 and 10 thermal resistance
= pin 9 and 10 temperature at package edge
= pin 9 and 10 to ambient thermal resistance
4A
and T
9,10A
From the earlier power dissipation calculation example:
P
the thermal model shown in Figure 77 below.
T
T
both of which are within the absolute maximum specifi-
cation of 125°C.
If we, however, assume a worst case PCB layout and no
air flow where the estimated q
Then the junction temperatures become
T
T
The output IC junction temperature exceeds the abso-
lute maximum specification of 125°C. In this case, PCB
layout and airflow will need to be designed so that the
junction temperature of the output IC does not exceed
125°C.
If the calculated junction temperatures for the thermal
model in Figure 78 is higher than 125°C, the pin temper-
ature for pins 9 and 10 should be measured (at the pack-
age edge) under worst case operating environment for a
more accurate estimate of the junction temperatures.
i
ji
jo
ji
jo
values shown here are for PCB layouts shown
= 90.8 mW, P
= (90.8 mW)(60°C/W + 50°C/W) + 100°C
= (217.3 mW)(30°C/W + 50°C/W) + 100°C
= 117°C
= (90.8 mW)(60°C/W + 100°C/W) + 100°C
= 115°C
= (217.3 mW)(30°C/W + 100°C/W) + 100°C
= 128°C
= 110°C
o
= 217.3 mW, T
A
4A
= 100°C, and assuming
and q
9,10A
are 100°C/W.