MC33982BPNA Freescale Semiconductor, MC33982BPNA Datasheet - Page 19

• Manufacturer Part Number: MC33982BPNA
• Description: IC SWITCH HI SIDE SINGLE 16-PQFN
• Manufacturer: Freescale Semiconductor
• Type: High Sider

Specifications of MC33982BPNA

• Input Type: SPI
• Number Of Outputs: 1
• On-state Resistance: 2 mOhm
• Voltage - Supply: 6 V ~ 27 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-PQFN, 16-PowerQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output / Channel: -
• Current - Peak Output: -

Fault, and Fail-safe.
succeeding paragraphs.
Table 6. Fail-safe Operation and Transitions to Other
SLEEP MODE
the state of the device after first applying battery voltage
(V
the device when the WAKE and
Sleep mode, the output and all unused internal circuitry, such
as the internal 5.0 V regulator, are off to minimize current
draw. In addition, all SPI-configurable features of the device
are as if set to Logic [0]. The device will transition to the
Normal or Fail-safe operating modes based on the WAKE
and
NORMAL MODE
FAIL-SAFE MODE AND WATCHDOG
detection is active when either the WAKE or
Analog Integrated Circuit Device Data
Freescale Semiconductor
Normal
Mode
x = Don’t care.
Sleep
Fault
Fail-
safe
PWR
The 33982 has four operating modes: Sleep, Normal,
The default mode of the 33982 is the Sleep mode. This is
The 33982 is in Normal mode when:
• V
•
• No fault has occurred.
If the FSI input is not grounded, the watchdog timeout
RST
RST
), prior to any I/O transitions. This is also the state of
PWR
inputs as defined in
FS
pin is Logic [1].
x
1
0
0
1
1
1
1
33982 Modes
is within the normal voltage range.
WAKE RST WDTO
0
x
1
x
0
1
0
1
Table 6
0
1
x
1
1
1
1
0
summarizes details contained in
Table
Yes
No
No
RST
x
6.
are both Logic [0]. In the
Device is in Sleep mode.
All outputs are OFF.
Normal mode. Watchdog
is active if enabled.
The device is currently in
Fault mode. The faulted
output is OFF.
Watchdog has timed out
and the device is in Fail-
safe mode. The output is
as configured with the
RFS resistor connected
to FSI. RST and WAKE
must be transitioned to
Logic [0] simultaneously
to bring the device out of
the Fail-safe mode or
momentarily tied the FSI
pin to ground.
FUNCTIONAL DEVICE OPERATION
Comments
RST
OPERATIONAL MODES
input pin
transitions from Logic [0] to Logic [1]. The WAKE input is
capable of being pulled up to V
resistance that limits the internal clamp current.
and is specified in
incoming SPI message is toggled within the minimum
watchdog timeout period (WDTO), based on the
programmed value of the WDR the device will operate
normally. If an internal watchdog timeout occurs before the
WD bit, the device will revert to a Fail-safe mode until the
device is reinitialized.
depending upon the resistor RFS connected to the FSI pin,
regardless of the state of the various direct inputs and modes
(Table
except for over-current high and low detection levels and
timing, which are reset to their default value (SOCL, SOCH,
OCLT). The watchdog, over-voltage, over-temperature, and
over-current circuitry (with default value for this one) are fully
operational.
Table 7. Output State During Fail-safe Mode
WDTO bit D2 of the WDR register. This bit is Logic [1] when
the device is in Fail-safe mode. The device can be brought
out of the Fail-safe mode by transitioning the WAKE and
pins from Logic [1] to Logic [0] or forcing the FSI pin to
Logic [0].
resetting the device from the latched Fail-safe mode.
operation is disabled.
LOSS OF V
even disconnected, all register content is reset. The output
can still be driven by the direct input IN. The 33982 uses the
battery input to power the output MOSFET related current
sense circuitry, and any other internal Logic, providing fail-
safe device operation with no V
watchdog, over-voltage, over-temperature, and over-current
circuitry are fully operational with default values. Current
recopy is active with the default current recopy value.
The watchdog timeout is a multiple of an internal oscillator
During the Fail-safe mode, the output will be ON or OFF
The Fail-safe mode can be detected by monitoring the
If the FSI pin is tied to GND, the Watchdog Fail-safe
If the external 5.0 V supply is not within specification, or
RFS (kΩ)
7). In this mode, the SPI register content is retained
10
30
0
Table 6
DD
summarizes the various methods for
Table
15. As long as the WD bit (D7) of an
FUNCTIONAL DEVICE OPERATION
Fail-safe Mode Disabled
PWR
DD
High Side State
supplied. In this state, the
HS OFF
with a series of limiting
HS ON
OPERATIONAL MODES
33982
RST
19