LP3971SQ-G824/NOPB National Semiconductor, LP3971SQ-G824/NOPB Datasheet - Page 45

• Manufacturer Part Number: LP3971SQ-G824/NOPB
• Description: IC PMU MULTI FUNCT PROGR 40-LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LP3971SQ-G824/NOPB

• Applications: Processor
• Current - Supply: 60µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• For Use With: LP3971SQ-B410EV - BOARD EVALUATION LP3971SQ-B410
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LP3971SQ-G824TR

Application Hints
LDO CONSIDERATIONS
External Capacitors
The LP3971’s regulators require external capacitors for reg-
ulator stability. These are specifically designed for portable
applications requiring minimum board space and smallest
components. These capacitors must be correctly selected for
good performance.
Input Capacitor
An input capacitor is required for stability. It is recommended
that a 1.0 µF capacitor be connected between the LDO input
pin and ground (this capacitance value may be increased
without limit).
This capacitor must be located a distance of not more than 1
cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low impedance
source of power (like a battery or a very large capacitor). If a
tantalum capacitor is used at the input, it must be guaranteed
by the manufacturer to have a surge current rating sufficient
for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain approximately
1.0 µF over the entire operating temperature range.
Output Capacitor
The LDO’s are designed specifically to work with very small
ceramic output capacitors. A 1.0 μF ceramic capacitor (tem-
perature types Z5U, Y5V or X7R) with ESR between 5 mΩ to
500 mΩ, are suitable in the application circuit.
For this device the output capacitor should be connected be-
tween the V
It is also possible to use tantalum or film capacitors at the
device output, C
for reasons of size and cost (see the section Capacitor Char-
acteristics).
The output capacitor must meet the requirement for the min-
imum value of capacitance and also have an ESR value that
is within the range 5 mΩ to 500 mΩ for stability.
No-Load Stability
The LDO’s will remain stable and in regulation with no exter-
nal load. This is an important consideration in some circuits,
for example CMOS RAM keep-alive applications.
Capacitor Characteristics
The LDO’s are designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
capacitance values in the range of 0.47 µF to 4.7 µF, ceramic
capacitors are the smallest, least expensive and have the
lowest ESR values, thus making them best for eliminating
high frequency noise. The ESR of a typical 1.0 µF ceramic
capacitor is in the range of 20 mΩ to 40 mΩ, which easily
meets the ESR requirement for stability for the LDO’s.
For both input and output capacitors, careful interpretation of
the capacitor specification is required to ensure correct device
operation. The capacitor value can change greatly, depend-
ing on the operating conditions and capacitor type. In partic-
ular, the output capacitor selection should take account of all
OUT
pin and ground.
OUT
(or V
OUT
), but these are not as attractive
45
the capacitor parameters, to ensure that the specification is
met within the application. The capacitance can vary with DC
bias conditions as well as temperature and frequency of op-
eration. Capacitor values will also show some decrease over
time due to aging. The capacitor parameters are also depen-
dant on the particular case size, with smaller sizes giving
poorer performance figures in general. As an example, Figure
4 shows a typical graph comparing different capacitor case
sizes in a Capacitance vs. DC Bias plot. As shown in the
graph, increasing the DC Bias condition can result in the ca-
pacitance value falling below the minimum value given in the
recommended capacitor specifications table. Note that the
graph shows the capacitance out of spec for the 0402 case
size capacitor at higher bias voltages. It is therefore recom-
mended that the capacitor manufacturers’ specifications for
the nominal value capacitor are consulted for all conditions,
as some capacitor sizes (e.g. 0402) may not be suitable in the
actual application.
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a temper-
ature range of −55°C to +125°C, will only vary the capacitance
to within ±15%. The capacitor type X5R has a similar toler-
ance over a reduced temperature range of −55°C to +85°C.
Many large value ceramic capacitors, larger than 1 µF are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature varies from 25°C to 85°C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambient
temperature will change significantly above or below 25°C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
0.47 µF to 4.7 µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum capac-
itor with an ESR value within the stable range, it would have
to be larger in capacitance (which means bigger and more
costly) than a ceramic capacitor with the same ESR value. It
should also be noted that the ESR of a typical tantalum will
increase about 2:1 as the temperature goes from 25°C down
to –40°C, so some guard band must be allowed.
FIGURE 4. Graph Showing a Typical Variation in
Capacitance vs. DC Bias
www.national.com
20180723