L6740LTR STMicroelectronics, L6740LTR Datasheet - Page 9
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L6740LTR
Manufacturer Part Number
L6740LTR
Description
IC HYBRID CONTROLLERS 48TQFP
Manufacturer
STMicroelectronics
Datasheet
1.L6740LTR.pdf
(44 pages)
Specifications of L6740LTR
Applications
Hybrid Controllers
Voltage - Supply
9 V ~ 15 V
Current - Supply
20mA
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Number Of Outputs
2
Output Current
170 A
Input Voltage
13.2 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6298-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L6740LTR
Manufacturer:
ST
Quantity:
20 000
L6740L
Table 2.
11
13
14
15
16
17
18
7
8
9
Pin#
10
12
Pin description (continued)
OVP / V_FIX
LTB_GAIN
Name
PSI_L
CS1+
CS2+
CS3+
CS1-
CS2-
CS3-
FBG
LTB
OS
Remote ground sense.
Connect to the negative side of the load for remote sensing. See
Section 9
Offset programming pin.
Internally set to 1.24 V. Connecting a R
set a current that is mirrored into FB pin in order to program a positive
offset according to the selected R
Short to SGND to disable the function. See
LTB Technology
Connect through an R
(CORE section) to detect load transient. See
OVP. Overvoltage programming pin. Internally pulled-up to 3.3 V by
11 μA. Connect to SGND through a R
(typ) to set a fixed voltage according to the R
will program 3.3 V threshold. See
V_FIX - Hardware override. Short to SGND to enter VFIX mode
(WARNING: this condition overrides any code programmed on the VIDx
lines). In this case, the device will use SVI inputs as static VIDs and
OVP threshold will be set to 1.8 V. See
LTB Technology
Connect to SGND through a resistor R
Gain. See
Power saving indicator (SVI mode).
Open-drain input/output pin. See
Channel 1 current sense positive Input. Connect through an R-C filter to
the phase-side of the channel 1 inductor.
See
Channel 1 current sense negative input. Connect through a R
to the output-side of the channel inductor.
See
Channel 2 current sense positive input. Connect through an R-C filter to
the phase-side of the channel 2 inductor.
See
Channel 2 current sense negative input. Connect through a R
to the output-side of the channel inductor.
See
Channel 3 current sense positive input. Connect through an R-C filter to
the phase-side of the channel 3 inductor. When working at 2 phase,
directly connect to V
See
Channel 3 current sense negative input. Connect through a R
to the output-side of the channel inductor. When working at 2 phase,
connect through R
See
Section 9
Section 9
Section 9
Section 9
Section 9
Section 9
for proper layout of this connection.
Section 10
for proper layout of this connection.
for proper layout of this connection.
for proper layout of this connection.
for proper layout of this connection.
for proper layout of this connection.
for proper layout of this connection.
TM
TM
G
input pin.
gain pin.
out_CORE
to CS3+.
Pins description and connection diagrams
for details.
LTB
- C
LTB
.
Function
network to the regulated voltage
Section 5.4.3
FB
Section 7
.
OVP
LTBGAIN
OS
Section 5.4.5
resistor and filter with 10 nF
resistor to SGND allows to
Section 6.4
for details.
OVP
Section 10
to program the LTB
for details.
resistor. If floating it
for details.
for details.
for details.
G
G
G
resistor
resistor
resistor
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