L6714TR STMicroelectronics, L6714TR Datasheet - Page 39
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L6714TR
Manufacturer Part Number
L6714TR
Description
IC CTRLR 4PHASE W/DRVRS 64-TQFP
Manufacturer
STMicroelectronics
Datasheet
1.L6714TR.pdf
(70 pages)
Specifications of L6714TR
Applications
Controller, Intel VR10, VR11, AMD CPU
Voltage - Input
12V
Number Of Outputs
4
Voltage - Output
0.3 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5095-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
L6714TR
Manufacturer:
WYC
Quantity:
22 140
Part Number:
L6714TR
Manufacturer:
ST
Quantity:
20 000
L6714
13
Dynamic VID transitions
The device is able to manage Dynamic VID Code changes that allow Output Voltage
modification during normal device operation. OVP and UVP signals (and PGOOD in case of
AMD Mode) are masked during every VID transition and they are re-activated after the
transition finishes with a 32 clock cycles delay to prevent from false triggering due to the
transition.
When changing dynamically the regulated voltage (D-VID), the system needs to charge or
discharge the output capacitor accordingly. This means that an extra-current I
be delivered, especially when increasing the output regulated voltage and it must be
considered when setting the over current threshold. This current can be estimated using the
following relationships:
where dV
for AMD DAC) and T
Overcoming the OC threshold during the dynamic VID causes the device to enter the
constant current limitation slowing down the output voltage dV/dt also causing the failure in
the D-VID test.
L6714 checks for VID code modifications
additional DVID-clock and waits for a confirmation on the following falling edge. Once the
new code is stable, on the next rising edge, the reference starts stepping up or down in LSB
increments every VID-clock cycle until the new VID code is reached. During the transition,
VID code changes are ignored; the device re-starts monitoring VID after the transition has
finished on the next rising edge available. VID-clock frequency (F
operative mode selected: for Intel Mode it is in the range of 1MHz to assure compatibility
with the specifications while, for AMD Mode, this frequency is lowered to about 250kHz.
When L6714 performs a D-VID transition in AMD Mode, DVID pin is pulled high as long as
the device is performing the transition (also including the additional 32clocks delay)
Warning:
OUT
is the selected DAC LSB (6.25mV for VR11 and VR10 Extended DAC or 25mV
If the new VID code is more than 1 LSB different from the
previous, the device will execute the transition stepping the
reference with the DVID-clock frequency F
code has reached: for this reason it is recommended to
carefully control the VID change rate in order to carefully
control the slope of the output voltage variation especially in
Intel Mode.
VID
is the time interval between each LSB transition (externally driven).
I
D VID
–
=
(See Figure
C
OUT
dV
----------------- -
dT
OUT
VID
13) on the rising edge of an internal
DVID
DVID
Dynamic VID transitions
) depends on the
until the new
D-VID
needs to
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