LT1935ES5#TRMPBF Linear Technology, LT1935ES5#TRMPBF Datasheet - Page 4

IC MULTI CONFIG ADJ 2A TSOT23-5

LT1935ES5#TRMPBF

Manufacturer Part Number
LT1935ES5#TRMPBF
Description
IC MULTI CONFIG ADJ 2A TSOT23-5
Manufacturer
Linear Technology
Type
Step-Up (Boost), Flyback, Sepicr
Datasheet

Specifications of LT1935ES5#TRMPBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.27 ~ 38 V
Current - Output
2A
Frequency - Switching
1.2MHz
Voltage - Input
2.3 ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-5, TSOT-5, TSOP-5
Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
38V
Output Current
2A
No. Of Pins
5
Operating Temperature Range
-40°C To +85°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Dc To Dc Converter Type
Step Up
Pin Count
5
Input Voltage
16V
Switching Freq
1400KHz
Package Type
TSOT-23
Output Type
Adjustable
Switching Regulator
Yes
Line Regulation
0.01%/V
Mounting
Surface Mount
Input Voltage (min)
2.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Lead Free Status / Rohs Status
Compliant
Other names
LT1935ES5#PBF
LT1935ES5#PBF
LT1935ES5#TRMPBF
LT1935ES5#TRMPBFTR

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PI FU CTIO S
BLOCK DIAGRA
OPERATIO
LT1935
SW (Pin 1): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to reduce EMI.
GND (Pin 2): Ground. Tie directly to local ground plane.
FB (Pin 3): Feedback Pin. Reference voltage is 1.265V.
Connect resistive divider tap here. Minimize trace area at
FB. Set V
The LT1935 uses a constant frequency, current mode
control scheme to provide excellent line and load regula-
tion. Operation can be best understood by referring to the
Block Diagram in Figure 2. At the start of each oscillator
cycle, the SR latch is set, turning on the power switch Q1.
A voltage proportional to the switch current is added to a
stabilizing ramp and the resulting sum is fed into the
positive terminal of the PWM comparator, A2. When this
voltage exceeds the level at the negative input of A2, the
SR latch is reset, turning off the power switch. The level
at the negative input of A2 is set by error amplifier A1, and
4
U
OUT
U
according to V
V
SHDN 4
OUT
U
V
FB 3
R1 (EXTERNAL)
R2 (EXTERNAL)
IN
U
5
FB
W
REFERENCE
OUT
1.265V
= 1.265V(1 + R1/R2).
+
A1
Figure 2. Block Diagram
OSCILLATOR
GENERATOR
R
C
C
1.2MHz
RAMP
C
is simply an amplified version of the difference between
the feedback voltage and the reference voltage of 1.265V.
In this manner, the error amplifier sets the correct peak
current level to keep the output in regulation. If the error
amplifier’s output increases, more current is delivered to
the output; if it decreases, less current is delivered. A
clamp on the output of A1 (not shown) limits the switch
current to 3A. A1’s output is also clamped to the voltage
on the SHDN pin, providing a soft-start function by con-
trolling the peak switch current during start-up.
Σ
SHDN (Pin 4): Shutdown Pin. Tie to 1.8V or more to enable
device. Ground to shut down. This pin also provides a soft-
start function; see Applications Information section.
V
IN
+
(Pin 5): Input Supply Pin. Must be locally bypassed.
COMPARATOR
A2
R
S
Q
DRIVER
x15
+
1
2
Q1
0.01Ω
1935 BD
SW
GND
1935f

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