L6710 STMicroelectronics, L6710 Datasheet - Page 3

• Manufacturer Part Number: L6710
• Description: IC CTRLR 6BIT 2PH PROGR 44-TQFP
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of L6710

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.84 ~ 1.6 V
• Current - Output: 2A
• Frequency - Switching: 150kHz
• Voltage - Input: 12V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Power - Output: 2.5W
• Product: Half-Bridge Drivers
• Supply Current: 12.5 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN FUNCTION
15, 16
10,11
6,7
12
13
14
17
18
19
20
21
N
1
2
3
4
5
8
9
REF_OUT
PGNDS
OUTEN
BOOT1
COMP
SGND
ISEN1
ISEN2
Name
VSEN
VCC
FBG
N.C.
N.C.
N.C.
N.C.
N.C.
FBR
FB
Not internally bonded.
Not internally bonded.
Channel 1 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode to VCC
(cathode vs. boot).
Not internally bonded.
Device supply voltage. The operative supply voltage is 12V ±15%.
Filter with 1µF (Typ.) capacitor vs. GND.
All the internal references are referred to this pin. Connect it to the PCB signal ground.
This pin is connected to the error amplifier output and is used to compensate the control
feedback loop.
This pin is connected to the error amplifier inverting input and is used to compensate the
voltage control feedback loop.
A current proportional to the sum of the current sensed in both channel is sourced from this
pin (50µA at full load, 70µA at the Constant Current threshold). Connecting a resistor
between this pin and VSEN pin allows programming the droop effect.
Not internally bonded.
Reference voltage output used for voltage regulation.
The pin is protected against short circuit vs. ground.
Filter to SGND with 47nF ceramic capacitor.
Manages Over&Under-voltage conditions and the PGOOD signal. It is internally connected
with the output of the Remote Sense Buffer for Remote Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to
manage OVP, UVP and PGOOD.
Connecting 1nF capacitor max vs. SGND can help in reducing noise injection.
Output Enable pin. Internally 3V pulled-up.
If forced to a voltage lower than 0.4V, the device stops operation with all mosfets and
protections OFF. Setting the pin free, the device re-start operations.
Filter with 1nF capacitor vs. SGND to avoid noise injection.
Not internally bonded.
Remote sense buffer non-inverting input. It has to be connected to the positive side of the
load to perform a remote sense.
If no remote sense is implemented, connect directly to the output voltage (in this case
connect also the VSEN pin directly to the output regulated voltage).
Remote sense buffer inverting input. It has to be connected to the negative side of the load
to perform a remote sense.
Pull-down to ground if no remote sense is implemented.
Channel 1 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet R
or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
Common Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISENx net in order to couple in common mode any picked-
up noise.
Channel 2 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet R
or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
dsON.
dsON.
This pin has to be connected to the low-side mosfet drain
This pin has to be connected to the low-side mosfet drain
Description
L6710
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