Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 150

• Manufacturer Part Number: Z8F64220100ZDA
• Description: ADAPTER ICE Z8 ENCORE 64K 64LQFP
• Manufacturer: Zilog

Specifications of Z8F64220100ZDA

• Module/board Type: *
• For Use With/related Products: Z8 Encore!™
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3403

Table 66. SPI Mode Register (SPIMODE)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
Caution:
SPI Mode Register
7
0 = SS input pin is asserted (Low).
1 = SS input is not asserted (High).
If SPI enabled as a Master, this bit is not applicable.
The SPI Mode register
value of the SS pin.
Reserved—Must be 0.
DIAG—Diagnostic Mode Control bit
This bit is for SPI diagnostics. Setting this bit allows the Baud Rate Generator value to be
read using the SPIBRH and SPIBRL register locations.
0 = Reading SPIBRH, SPIBRL returns the value in the SPIBRH and SPIBRL registers
1 = Reading SPIBRH returns bits [15:8] of the SPI Baud Rate Generator; and reading
NUMBITS[2:0]—Number of Data Bits Per Character to Transfer
This field contains the number of bits to shift for each character transfer. For information
on valid bit positions when the character length is less than 8-bits, see SPI Data Register
description.
Reserved
Exercise caution if reading the values while the BRG is counting.
SPIBRL returns bits [7:0] of the SPI Baud Rate Counter. The Baud Rate Counter
000 = 8 bits
001 = 1 bit
010 = 2 bits
011 = 3 bits
100 = 4 bits
101 = 5 bits
110 = 6 bits
111 = 7 bits
High and Low byte values are not buffered.
R
6
DIAG
(Table
5
66) configures the character bit width and the direction and
4
F63H
NUMBITS[2:0]
0
3
R/W
Z8 Encore! XP
2
Product Specification
Serial Peripheral Interface
SSIO
1
®
F64XX Series
SSV
0
136