Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 182

• Manufacturer Part Number: Z8F64220100ZDA
• Description: ADAPTER ICE Z8 ENCORE 64K 64LQFP
• Manufacturer: Zilog

Specifications of Z8F64220100ZDA

• Module/board Type: *
• For Use With/related Products: Z8 Encore!™
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3403

Table 84. DMA_ADC Control Register (DMAACTL)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
DMA_ADC Control Register
DAEN
7
DMAA_ADDR—DMA_ADC Address
These bits specify the seven most-significant bits of the 12-bit Register File addresses
used for storing the ADC output data. The ADC Analog Input Number defines the five
least-significant bits of the Register File address. Full 12-bit address is
{DMAA_ADDR[7:1], 4-bit ADC Analog Input Number, 0}.
Reserved
This bit is reserved and must be 0.
The DMA_ADC Control register
enable and interrupt enable) for ADC operation.
DAEN—DMA_ADC Enable
0 = DMA_ADC is disabled and the ADC Analog Input Number (ADC_IN) is reset to 0.
1 = DMA_ADC is enabled.
IRQEN—Interrupt Enable
0 = DMA_ADC does not generate any interrupts.
1 = DMA_ADC generates an interrupt after transferring data from the last ADC Analog
Input specified by the ADC_IN field.
Reserved
These bits are reserved and must be 0.
ADC_IN—ADC Analog Input Number
These bits set the number of ADC Analog Inputs to be used in the continuous update
(data conversion followed by DMA data transfer). The conversion always begins with
ADC Analog Input 0 and then progresses sequentially through the other selected ADC
Analog Inputs.
0000 = ADC Analog Input 0 updated.
0001 = ADC Analog Inputs 0-1 updated.
0010 = ADC Analog Inputs 0-2 updated.
0011 = ADC Analog Inputs 0-3 updated.
0100 = ADC Analog Inputs 0-4 updated.
IRQEN
6
5
Reserved
(Table 84
4
FBEH
R/W
0
on page 168) enables and sets options (DMA
3
Z8 Encore! XP
2
Direct Memory Access Controller
ADC_IN
Product Specification
1
®
F64XX Series
0
168