OM6290 NXP Semiconductors, OM6290 Datasheet - Page 42
![DEMO BOARD LCD GRAPHIC DRIVER](/photos/9/4/90479/om6290_sml.jpg)
OM6290
Manufacturer Part Number
OM6290
Description
DEMO BOARD LCD GRAPHIC DRIVER
Manufacturer
NXP Semiconductors
Datasheets
1.PCF8576T1118.pdf
(44 pages)
2.OM6290.pdf
(30 pages)
3.OM6290.pdf
(51 pages)
4.OM6290.pdf
(83 pages)
Specifications of OM6290
Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16/32-Bit
Utilized Ic / Part
PCF2119, PCF8531, PCF8576
Primary Attributes
Character, Graphic and Segment LCD Drivers
Secondary Attributes
JTAG, I²C, UART & USB Interfaces
Description/function
Demo Board
Interface Type
USB, I2C, JTAG, UART
Data Bus Width
4 bit, 8 bit, 16 bit
Operating Voltage
1.8 V to 5.5 V
For Use With/related Products
PCF8576DT, PCF2119S, PCF8531
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4703
NXP Semiconductors
11. Basic architecture
PCF2119X
Product data sheet
11.1 Parallel interface
The PCF2119x can send data in either two 4-bit operations or one 8-bit operation and can
thus interface to 4-bit or 8-bit microcontrollers.
In 8-bit mode data is transferred as 8-bit bytes using the 8 ports DB7 to DB0. Three further
control lines E, RS and R/W are required.
In 4-bit mode data is transferred in two cycles of 4 bits each using ports DB7 to DB4 for
the transaction. The higher order bits (corresponding to range of bit 7 to bit 4 in 8-bit
mode) are sent in the first cycle and the lower order bits (bit 3 to bit 0 in 8-bit mode) in the
second cycle. Data transfer is complete after two 4-bit data transfers. It should be noted
that two cycles are also required for the busy flag check. 4-bit operation is selected by
instruction (see
In 4-bit mode, ports DB3 to DB0 must be left open-circuit. They are pulled up to V
internally.
Fig 24. 4-bit transfer example
R/W
DB7
DB6
DB5
DB4
RS
E
All information provided in this document is subject to legal disclaimers.
Figure 24
instruction
IR7
IR6
IR5
IR4
write
Rev. 9 — 14 April 2011
to
IR3
IR2
IR1
IR0
Figure 26
AC6
AC5
AC4
BF
for examples of bus protocol).
address counter read
busy flag and
AC3
AC2
AC1
AC0
DR7
DR6
DR5
DR4
LCD controllers/drivers
data register
PCF2119x
read
© NXP B.V. 2011. All rights reserved.
DR3
DR2
DR1
DR0
mga804
DD
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