CDB5376 Cirrus Logic Inc, CDB5376 Datasheet

EVALUATION BOARD FOR CS5376

CDB5376

Manufacturer Part Number
CDB5376
Description
EVALUATION BOARD FOR CS5376
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5376

Main Purpose
Seismic Evaluation System
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS3301A, CS3302A, CS4373A, CS5372A, CS5376A
Primary Attributes
Quad Digital Filter
Secondary Attributes
Graphical User Interface, SPI™ & USB Interfaces
Processor To Be Evaluated
CS330x, CS4373A, CS537x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1778
Features
http://www.cirrus.com
INR+
INF+
INF-
INR-
VREF+
VREF-
Fourth-order ΔΣ Architecture
Clock-jitter-tolerant Architecture
Input Voltage: 5 V
Input Signal Bandwidth: DC to 2 kHz
High Dynamic Range
• 127 dB SNR @ 215 Hz BW (2 ms sampling)
• 124 dB SNR @ 430 Hz BW (1 ms sampling)
Low Total Harmonic Distortion
• -118 dB THD typical (0.000126%)
Low Power Consumption
• Normal operation: 25 mW per channel
• Power down: 10 µW per channel
Small Footprint, 24-pin SSOP package
Multi-channel System Support
• 1-channel System: CS5371A
• 2-channel System: CS5372A
• 3-channel System: CS5371A + CS5372A
• 4-channel System: CS5372A + CS5372A
Bipolar Power Supply Configuration
• VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V
CS5371A
VA-
VA+
Low-power, High-performance
ΔΣ Modulator
4th Order
PWDN
pp
OFST
Fully Differential
Generator
Clock
VD
GND
Copyright  Cirrus Logic, Inc. 2010
MFLAG
MDATA
MCLK
MSYNC
(All Rights Reserved)
Description
The CS5371A and CS5372A are one- and two-channel,
high-dynamic-range, fourth-order ΔΣ modulators intend-
ed for geophysical and sonar applications. When
combined with CS3301A / CS3302A differential amplifi-
ers, the CS4373A test DAC and CS5376A digital filter, a
small, low-power, self-testing, high-accuracy, multi-
channel measurement system results.
The modulators have high dynamic range and low total
harmonic distortion with very low power consumption.
They convert differential analog input signals from the
CS3301A / CS3302A amplifiers to an oversampled seri-
al bit stream at 512 kbits per second. This oversampled
bit stream is then decimated by the CS5376A digital filter
to a 24-bit output at the selected output word rate.
In normal operation, power consumption is 5 mA per
channel. Each modulator can be independently powered
down to 500 µA per channel, and by halting the input
clock they will enter a micro-power state using only 2 µA
per channel.
The CS5371A and CS5372A modulators are available in
small 24-pin SSOP packages, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
INR1+
INF1+
INF1-
INR1-
VREF+
VREF-
INR2+
INF2+
INF2-
INR2-
See
page
VA-
VA+
ΔΣ Modulator
ΔΣ Modulator
ΔΣ
30.
4th Order
4th Order
PWDN1
PWDN2
Modulators
OFST
CS5371A
CS5372A
Generator
CS5372A
Clock
VD
GND
DS748F3
SEP ‘10
MFLAG1
MDATA1
MCLK
MSYNC
MFLAG2
MDATA2

Related parts for CDB5376

CDB5376 Summary of contents

Page 1

Low-power, High-performance Features Fourth-order ΔΣ Architecture   Clock-jitter-tolerant Architecture  Input Voltage Fully Differential pp  Input Signal Bandwidth kHz  High Dynamic Range • 127 dB SNR @ 215 ...

Page 2

TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4 SPECIFIED OPERATING CONDITIONS ................................................................................. 4 ABSOLUTE MAXIMUM RATINGS ........................................................................................... 4 TEMPERATURE CONDITIONS ............................................................................................... 5 ANALOG INPUT CHARACTERISTICS ................................................................................... 5 PERFORMANCE CHARACTERISTICS ................................................................................... 6 PERFORMANCE CHARACTERISTICS (CONT.) .................................................................... 7 PERFORMANCE PLOTS ......................................................................................................... ...

Page 3

LIST OF FIGURES Figure 1. Anti-alias Filter Components............................................................................................ 5 Figure 2. Modulator Noise Performance ......................................................................................... 8 Figure 3. Modulator + CS4373A Test DAC Dynamic Performance ................................................ 8 Figure 4. Digital Input Rise and Fall Times ..................................................................................... 9 Figure 5. Digital ...

Page 4

CHARACTERISTICS AND SPECIFICATIONS • Min / Max characteristics and specifications are guaranteed over the • Typical performance characteristics and specifications are measured at nominal supply voltages and T • GND = 0 V. Single-ended voltages with respect to GND, ...

Page 5

TEMPERATURE CONDITIONS Parameter Ambient Operating Temperature Storage Temperature Range Allowable Junction Temperature Junction to Ambient Thermal Impedance (4-layer PCB) ANALOG INPUT CHARACTERISTICS Parameter VREF Input [VREF+] - [VREF-] VREF- VREF Input Current VREF Input Noise , Modulator INR± INF± Inputs ...

Page 6

PERFORMANCE CHARACTERISTICS Parameter Signal Characteristics Input Signal Frequencies Full-scale Differential AC Input Full-scale Differential DC Input Input Common Mode Voltage Input Voltage Range (V ± Signal ) cm Dynamic Performance Dynamic Range (1/4 ms 1720 Hz (Note 10, ...

Page 7

PERFORMANCE CHARACTERISTICS (CONT.) Parameter Gain Accuracy Channel to Channel Gain Accuracy Channel Gain Drift Offset Offset Voltage, Differential Offset Voltage, CS5371A Offset Voltage, CS5372A channel 1 Offset Voltage, CS5372A channel 2 Offset after Calibration Offset Calibration Range Offset Voltage Drift ...

Page 8

PERFORMANCE PLOTS Figure 3. Modulator + CS4373A Test DAC Dynamic Performance 8 Figure 2. Modulator Noise Performance CS5371A CS5372A DS748F3 ...

Page 9

DIGITAL CHARACTERISTICS Parameter Digital Inputs High-level Input Voltage Low-level Input Voltage Input Leakage Current Digital Input Capacitance Input Rise Times Except MCLK Input Fall Times Except MCLK Digital Outputs = -40 μA High-level Output Voltage, I out = 40 μA ...

Page 10

DIGITAL CHARACTERISTICS (CONT.) Parameter Master Clock Input MCLK Frequency MCLK Period MCLK Duty Cycle MCLK Rise Time MCLK Fall Time MCLK Jitter (in-band or aliased in-band) MCLK Jitter (out-of-band) Master Sync Input MSYNC Setup Time to MCLK Falling MSYNC Period ...

Page 11

DIGITAL CHARACTERISTICS (CONT.) SYNC MCLK (2.048 MHz) MSYNC t 0 MDATA (512 kHz) MFLAG TDATA (256 kHz) MCLK (2.048 MHz) t mss MSYNC MDATA (512 kHz) MFLAG DS748F3 Figure 6. System Timing Diagram t t msh mclk ...

Page 12

POWER SUPPLY CHARACTERISTICS Parameter Power Supply Current, CS5371A Analog Power Supply Current Digital Power Supply Current Power Supply Current, CS5372A ch1 + ch2 Analog Power Supply Current Digital Power Supply Current Power Supply Current, CS5372A ch1 or ch2 only Analog ...

Page 13

SYSTEM DIAGRAM Differential Sensor Differential Sensor Differential Sensor Differential Sensor VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- VA+ VREF VA- VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- DS748F3 CS3301A CS3302A M ...

Page 14

VA+ PWDN INR+ INF+ 4th Order ΔΣ Modulator INF- INR- VREF+ VREF- CS5371A VA- OFST Figure 10. CS5371A and CS5372A Block Diagrams 3. MODULATOR OPERATION The CS5371A and CS5372A are one- and two-channel, fourth-order ΔΣ modulators opti- mized for extremely ...

Page 15

Modulator CS5376A Digital Filter Differential 24-Bit Output Code Analog Input Signal Offset -60 mV Corrected > + (VREF+5%) Error Flag Possible + VREF 5D1420 5AD840 0 V 000000 FDC420 - VREF A2EBE0 A527C0 > - (VREF+5%) Error Flag Possible Table ...

Page 16

VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- VA+ VREF 2.5 V VA- VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- 4. ANALOG SIGNALS The CS5371A and CS5372A modulators have differential analog inputs which ...

Page 17

Anti-alias Filter The modulator inputs are required to be band- width limited to ensure modulator loop stability and prevent high-frequency signals from alias- ing into the measurement bandwidth. The use of simple, single-pole, differential, low-pass RC filters across the ...

Page 18

VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- VA+ VREF 2.5 V VA- VA+ VA+ OUTR+ OUTF+ CS3301A CS3302A AMPLIFIER OUTF- OUTR- VA- VA- 5. DIGITAL SIGNALS The CS5371A and CS5372A modulators are designed to operate with ...

Page 19

The CS5371A and CS5372A MSYNC input is rising-edge triggered and resets the internal MCLK counter/divider to guarantee synchro- nous operation with other system devices. While the MSYNC signal synchronizes the in- ternal operation of the modulators, by default, it does ...

Page 20

POWER MODES The CS5371A and CS5372A modulators have three power modes. Normal operation, power down with MCLK enabled, and power down with MCLK disabled. 6.1 Normal Operation With MCLK active and the PWDN pin driven low, the CS5371A and ...

Page 21

From VA+ Regulator 100 μF From VA- Regulator 100 μF 7. VOLTAGE REFERENCE The CS5371A and CS5372A modulators re- quire a 2.500 V precision voltage reference to ± be supplied to the VREF pins. 7.1 VREF Power Supply To guarantee ...

Page 22

MCLK. The voltage reference external RC filter series resistor creates a voltage divider with the VREF input impedance to reduce the effective applied input voltage. To minimize gain error resulting from this voltage ...

Page 23

To VA+ Regulator To VA- Regulator 100 uF 8. POWER SUPPLIES The CS5371A and CS5372A modulators have a positive analog power supply pin (VA+), a negative analog power supply pin (VA-), a dig- ital power supply pin (VD), and a ...

Page 24

SCR Latch-up Considerations It is recommended to connect the VA- power supply to system ground (GND) with a re- verse-biased Schottky diode. At power up, if the VA+ power supply ramps up before the VA- supply is established, the ...

Page 25

PIN DESCRIPTION - CS5371A Rough Non-Inverting Input Fine Non-Inverting Input Fine Inverting Input Rough Inverting Input Positive Voltage Reference Input Negative Voltage Reference Input Negative Analog Power Supply Positive Analog Power Supply No Internal Connection No Internal Connection No ...

Page 26

VREF+ Positive Voltage Reference Input, pin 5 Input for an external +2.500 V voltage reference relative to VREF-. _ VREF- Negative Voltage Reference Input, pin 6 This pin should be tied to VA- near the voltage reference output. Digital ...

Page 27

PIN DESCRIPTION - CS5372A Ch. 1 Rough Non-Inverting Input Ch. 1 Fine Non-Inverting Input Ch. 1 Fine Inverting Input Ch. 1 Rough Inverting Input Positive Voltage Reference Input Negative Voltage Reference Input Negative Analog Power Supply Positive Analog Power ...

Page 28

VREF+ Positive Voltage Reference Input, pin 5 Input for an external +2.5 V voltage reference relative to VREF-. _ VREF- Negative Voltage Reference Input, pin 6 This pin should be tied to VA- near the voltage reference output. Digital ...

Page 29

PACKAGE DIMENSIONS 11. 24 PIN SSOP PACKAGE DRAWING TOP VIEW DIM ∝ Notes: 1. “D” and “E1” are reference datums and do not included mold flash ...

Page 30

ORDERING INFORMATION Model CS5371A-ISZ (lead free) CS5372A-ISZ (lead free) 30 Temperature -40 to +85 °C CS5371A CS5372A Package 24-pin SSOP DS748F3 ...

Page 31

MANUFACTURING, & HANDLING INFORMATION Model Number CS5371A-ISZ (lead free) CS5372A-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS748F3 Peak Reflow Temp MSL Rating* 260 °C CS5371A CS5372A Max Floor Life 3 7 Days 31 ...

Page 32

HISTORY Revision Date PP1 OCT 2006 Preliminary release. F1 DEC 2006 Updated to final status with most-recent characterization data for Cirrus QPL pro- cess. F2 SEP 2009 P.1 Remove “-112dB THD Maximum” bullet. P.7 Add typical THD specification for ...

Related keywords