LMH1982SQEEVAL National Semiconductor, LMH1982SQEEVAL Datasheet - Page 15

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LMH1982SQEEVAL

Manufacturer Part Number
LMH1982SQEEVAL
Description
BOARD EVAL FOR LMH1982SQE
Manufacturer
National Semiconductor

Specifications of LMH1982SQEEVAL

Main Purpose
Video, Video Processing
Utilized Ic / Part
LMH1982SQE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
When the output is genlocked to the reference, the input reference is used to reset the internal
circuit controlling the TOF output. In the text field for TOF Reset Counter, you can specify the
counter reset value, or TOF_RST. Therefore, the output TOF pulse will occur every N input
frames, where N = TOF_RST. Refer to the datasheet to determine the correct value for
TOF_RST.
In the TOF Ref. Clock control, select the SD Clock or HD Clock as the reference clock for the
output TOF pulse timing.
In the text field for Output Format Pixels per Line, specify the total number of pixels/samples per
line for the desired output format.
In the text field for Output Format Lines per Frame, specify the total number of lines per frame
for the desired output format.
In the text field for Input Format Lines per Frame, specify the total number of lines per frame for
the input reference format.
In the text field for TOF Offset, specify the number of lines to delay the TOF output pulse. The
line delay will be with respect to the input format. The TOF output pulse can be advanced by
programming a value equal to the maximum number of lines per frame of the input format minus
the desired advance. TOF_OFFSET must be greater than zero but less than or equal to the total
lines per reference frame. If no line offset is required, then set TOF_OFFSET equal to
REF_LPFM instead of zero (invalid). Refer to the datasheet for programming TOF Offset to
properly align the TOF pulse with the true top of frame location for the input reference.
5.3.6 PLL Information Box
For your reference, this information box provides short descriptions for PLLs 1 – 4. PLL 1 uses
an external loop filter and external 27 MHz VCXO, while PLLs 2 – 4 have integrated loop filters
and VCOs.
5.3.7 Charge Pump Current Control
National Semiconductor Corp.
Rev. 2.1, 5/13/2008
Page 15 of 20

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