ISL98003INZ-EVALZ Intersil, ISL98003INZ-EVALZ Datasheet - Page 19

• Manufacturer Part Number: ISL98003INZ-EVALZ
• Description: EVALUATION BOARD FOR ISL98003INZ
• Manufacturer: Intersil

Specifications of ISL98003INZ-EVALZ

• Main Purpose: Interface, Analog Front End (AFE)
• Embedded: No
• Utilized Ic / Part: ISL98003
• Primary Attributes: Triple 8-Bit ADC, 8x Oversampling
• Secondary Attributes: Automatic Black Level Compensation (ABLC™)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Listing
ADDRESS
0x52
0x53
0x54
0x55
Phase ADJ MASK V, (0x01)
Horizontal pixel mask 1,
(0x01)
Horizontal pixel mask 2,
(0x01)
Phase Adjust Command
Options, (0x20)
(DEFAULT VALUE)
REGISTER
(Continued)
19
BITS
2:0
6:4
7:0
7:0
3
0
1
2
3
4
5
6
7
PADJ Exclude v2
N/A
PADJ
PADJ Exclude h1
PADJ Exclude h2
PADJ Blue Disable
PADJ Green Disable
PADJ Red Disable
PADJ Adjust Search Option Search option for auto phase adjustment
PADJ Adjust Speed
Update Phase on VSYNC
PADJ Soft Reset
Reserved
FUNCTION NAME
E
xclude v1
ISL98003
Vertical line mask: How many lines to exclude before the
leading edge of VSYNC
000: 0 lines
001: 1 lines (default)
010: 2 lines
011: 4 lines
100: 6 lines
101: 8 lines
110: 10 lines
111: 12 lines
Choose how many lines to exclude after the leading edge of
VSYNC (typically used to exclude VBI data)
000: 5 lines (default)
001: 18 lines
010: 19 lines (480i)
011: 20 lines (1080i)
100: 22 lines (576i)
101: 25 lines (720p)
110: 41 lines (480p/1080p)
111: 44 lines (576p)
If a value of ‘N’ is programmed in this register, 2*N pixels after
the active edge of HSOUT will be excluded from data
collection.
Must be >0 for proper operation.
If a value of ‘N’ is programmed in this register, 2*N pixels
before the active edge of HSOUT will be excluded from data
collection.
Must be >0 for proper operation.
Enable/disable blue color for measurement
0: enable
1: disable
Enable/disable green color for measurement
0: enable
1: disable
Enable/disable red color for measurement
0: enable
1: disable
0: best phase
1: worst phase
This is a hidden bit for customers. It decides whether the
search steps are 28 (fast) or 64 VSYNC intervals (slow).
0: 28 VSYNCs
1: 64 VSYNCs
0: phase updated immediately
1: phase updated on VSYNC (default)
0: Normal operation
1: Reset all phase adjust state machines
Set to 0
Take high then low to reset phase adjust block
DESCRIPTION
September 12, 2008
FN6760.0