CLINK3V48BT-133 National Semiconductor, CLINK3V48BT-133 Datasheet - Page 6
CLINK3V48BT-133
Manufacturer Part Number
CLINK3V48BT-133
Description
BOARD EVAL FOR DS90CR485, 486
Manufacturer
National Semiconductor
Datasheets
1.DS90CR486VSNOPB.pdf
(18 pages)
2.DS90CR485VSNOPB.pdf
(16 pages)
3.CLINK3V48BT-112.pdf
(20 pages)
4.CLINK3V48BT-133.pdf
(32 pages)
Specifications of CLINK3V48BT-133
Main Purpose
Interface, SerDes (Serializer / De-Serializer)
Embedded
No
Utilized Ic / Part
DS90CR485, DS90CR486
Primary Attributes
Serializes 48 LVCMOS/LVTTL to 8 LVDS, 66 ~ 133 MHz
Secondary Attributes
Transmits over 2 Meter 3M MDR LVDS Cable
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
20025225
C—Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
Tppos—Transmitter output pulse position (min and max)
RSKMD = ISI (Inter-symbol interference) + TPPOS(variance) + LVDS Source Clock Jitter (cycle to cycle)
Cable Skew—typically 10 ps–40 ps per foot, media dependent
Note 8: Refer to transmitter datasheet for Cycle-to-cycle LVDS Output jitter specification.
Note 9: ISI is dependent on interconnect length; may be zero. Pre-emphasis in the transimitter is used to reduce the ISI. Refer to transmitter datasheet for more
information.
FIGURE 7. Receiver Skew Margin with DESKEW (RSKMD)
www.national.com
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