EVB-LAN9500A-MII SMSC, EVB-LAN9500A-MII Datasheet - Page 56

EVALUATION BOARD LAN9500-ABZJ

EVB-LAN9500A-MII

Manufacturer Part Number
EVB-LAN9500A-MII
Description
EVALUATION BOARD LAN9500-ABZJ
Manufacturer
SMSC
Series
0133r
Datasheets

Specifications of EVB-LAN9500A-MII

Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
LAN9500
Primary Attributes
Single Chip Hi-Speed USB to 10/100 Ethernet
Secondary Attributes
Full Duplex and HP Auto-MDIX Support, 10BASE-T and 100BASE-TX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1072
EVB9500MII
Revision 1.0 (05-17-10)
8.5.4
SYMBOL
t
EEDI (VERIFY)
t
t
t
t
t
cshckh
t
t
t
t
ckhdis
dhckh
dvckh
dsckh
ckldis
cshdv
cklcsl
dhcsl
ckcyc
t
t
t
ckh
ckl
csl
EECLK
EEPROM Timing
The following specifies the EEPROM timing requirements for the device:
EEDO
EECS
EEDI
EECLK Cycle time
EECLK High time
EECLK Low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to data disable (OUTPUT)
EEDIO valid after EECS high (VERIFY)
EEDIO hold after EECS low (VERIFY)
EECS low
DESCRIPTION
t
cshckh
Table 8.17 EEPROM Timing Values
t
cshdv
Figure 8.4 EEPROM Timing
t
ckh
t
t
dsckh
ckcyc
DATASHEET
t
dvckh
t
ckl
56
t
ckhdis
t
dhckh
1070
1070
1110
MIN
550
550
550
550
580
30
90
0
0
t
USB 2.0 to 10/100 Ethernet Controller
ckldis
TYP
t
cklcsl
t
dhcsl
t
csl
SMSC LAN950x Family
MAX
1130
570
570
600
Datasheet
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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