EVAL-AD7739EBZ Analog Devices Inc, EVAL-AD7739EBZ Datasheet - Page 12
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EVAL-AD7739EBZ
Manufacturer Part Number
EVAL-AD7739EBZ
Description
BOARD EVAL FOR AD7739
Manufacturer
Analog Devices Inc
Datasheet
1.AD7739BRUZ.pdf
(32 pages)
Specifications of EVAL-AD7739EBZ
Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
15.1k
Data Interface
Serial
Inputs Per Adc
8 Single Ended
Input Range
±2.5 V
Power (typ) @ Conditions
85mW @ 5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Utilized Ic / Part
AD7739
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD7739
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 10. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
Figure 11. Pin Configuration (24-Lead TSSOP)
AINCOM/P0
MCLKOUT
SYNC/P1
MCLKIN
RESET
AV
SCLK
AIN7
AIN6
AIN5
AIN4
CS
DD
SCLK
MCLKIN
MCLKOUT
AV
AINCOM/P0
Mnemonic
CS
RESET
10
11
12
1
2
3
4
5
6
7
8
9
DD
(Not to Scale)
TOP VIEW
AD7739
24
23
22
21
20
19
18
17
16
15
14
13
DGND
DV
DIN
DOUT
RDY
AGND
REFIN(–)
REFIN(+)
AIN0
AIN1
AIN2
AIN3
03742-0-011
DD
Description
Serial Clock. Schmitt triggered logic input. An external serial clock is applied to this input
to transfer serial data to or from the AD7739.
Master Clock Signal for the ADC. This can be provided in the form of a crystal/resonator or
external clock. A crystal/resonator can be tied across the MCLKIN and MCLKOUT pins.
Alternatively, MCLKIN can be driven with a CMOS compatible clock and MCLKOUT can be
left unconnected.
Master Clock Signal for the ADC. When the master clock for the device is a crystal/
resonator, the crystal/resonator is connected between MCLKIN and MCLKOUT. If an
external clock is applied to the MCLKIN, MCLKOUT provides an inverted clock signal or
can be switched off to reduce the device power consumption. MCLKOUT can drive one
CMOS load.
Chip Select. Active low Schmitt triggered logic input with an internal pull-up resistor.
With this input hardwired low, the AD7739 can operate in its 3-wire interface mode using
SCLK, DIN, and DOUT. CS can be used to select the device in systems with more than one
device on the serial bus. It can also be used as an 8-bit frame synchronization signal.
Schmitt Triggered Logic Input. Active low input that resets the control logic, interface
logic, digital filter, analog modulator, and all on-chip registers of the part to power-on
status. Effectively, everything on the part except the clock oscillator is reset when the
RESET pin is exercised.
Analog Positive Supply Voltage, 5 V to AGND Nominal.
Analog Inputs Common Terminal/Digital Output. The function of this pin is determined
by the P0 DIR bit in the I/O port register; the digital value can be written as the P0 bit in
the I/O port register. The digital voltage is referenced to analog supplies. When
configured as an input (P0 DIR bit set to 1), the single-ended analog inputs 0 to 7
(AIN0–AIN7) can be referenced to this pin’s voltage level.
Rev. 0 | Page 12 of 32
AINCOM/P0
SYNC/P1
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AGND
MUX
I/O PORT
AV
AV
DD
Figure 12. Block Diagram
DD
MCLKOUT
CALIBRATION
AD7739
GENERATOR
CIRCUITRY
CLOCK
BUFFER
MCLKIN
REFIN(–)
INTERFACE
CONTROL
SERIAL
DGND
LOGIC
REFERENCE
Σ-∆ ADC
24-BIT
DETECT
DV
REFIN(+)
DV
DD
DD
03742-0-012
CS
SCLK
DOUT
DIN
RESET
RDY