STEVAL-PSQ001V1 STMicroelectronics, STEVAL-PSQ001V1 Datasheet - Page 44

BOARD EVAL BASED ON PM6680A

STEVAL-PSQ001V1

Manufacturer Part Number
STEVAL-PSQ001V1
Description
BOARD EVAL BASED ON PM6680A
Manufacturer
STMicroelectronics
Type
Other Power Managementr
Datasheets

Specifications of STEVAL-PSQ001V1

Design Resources
STEVAL-PSQ001V1 Gerber Files STEVAL-PSQ001V1 Schematic STEVAL-PSQ001V1 Bill of Material
Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
6, Non-Isolated
Voltage - Output
0.9 ~ 2.5 V, 1 ~ 3.3 V, 2x 3.3 V, 2.5 V, 5 V
Current - Output
4A, 2A, 800mA, 400mA, 400mA, 150mA
Voltage - Input
5 ~ 36V
Regulator Topology
Buck
Frequency - Switching
200kHz, 300kHz
Board Type
Fully Populated
Utilized Ic / Part
PM6680A
Input Voltage
5 V to 36 V
Output Voltage
1 V to 3.3 V
Product
Power Management Modules
Silicon Manufacturer
ST Micro
Silicon Core Number
PM6680A
Kit Application Type
Power Management
Application Sub Type
Power Supply
Kit Contents
Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
PM6680A
Other names
497-6425
STEVAL-PSQ001V1
Design guidelines
44/48
As general rule, make the high side and low side drivers traces wide and short. The
high side driver is powered by the bootstrap circuit. It's very important to place
capacitor CBOOT and diode DBOOT as near as possible to the HGATE pin (for
example on the layer opposite to the device). Route HGATE and PHASE traces as near
as possible in order to minimize the area between them.
The Low side gate driver is powered by the 5 V linear regulator output. Placing PGND
and LGATE pins near the low side MOSFETs reduces the length of the traces and the
crosstalk noise between the two sections.
The linear regulator output LDO5 is referred to SGND as long as the reference voltage
Vref. Place their output filtering capacitors as near as possible to the device.
Place input filtering capacitors near VCC and VIN pins.
It would be better if the feedback networks connected to COMP, FB and OUT pins are
"referred" to SGND in the same point as reference voltage Vref. To avoid capacitive
coupling place these traces as far as possible from the gate drivers and phase
(switching) paths.
Place the current sense traces on the bottom side. Using It is recommended to use a
dedicated connection between the switching node and the current limit resistor
R
CSENSE
.
PM6680A

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