DK86060-3 Fujitsu Semiconductor America Inc, DK86060-3 Datasheet - Page 6

• Manufacturer Part Number: DK86060-3
• Description: KIT DEV 16BIT DAC FOR MB86060
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86060-3

• Number Of Dac's: 1
• Number Of Bits: 16
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 400M
• Data Interface: Parallel
• Dac Type: Current
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86060
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1009

1.2.2
The clock multiplier can be set in one of eight modes. These take the form of two basic groups, either
multiplier functioning or bypassed.
Multiplier Bypassed
With the multiplier in bypass mode, MUL[2:0] = 000, then the clock frequency applied at CLK In, (F
will be the update frequency used by the DAC core, (F
(F
F
F
Multiplier Enabled
With the multiplier enabled (modes x1 to x8, MUL[2:0] = 001 to 111), then the clock frequency at CLK
In (F
multiplier setting. This will be the frequency available at Data CLK out, (F
frequency used by the DAC core, (F
filters are selected, F
filtering is selected, then F
and 32.F
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
DAC
DATA
Data CLK
DATA
CLK In
IN
. If the x2 filter, slow or fast, is selected, then F
) will be applied to the input of the clock multiplier (F
= F
), will be dependant on the interpolation filter settings. If no filters are selected, then F
XIN
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
IN
DAC
. See Table 2.
Clock Multiplier Modes
/4. See Table 2.
DAC
= F
DAC
MB86060 16-bit Interpolating Digital to Analog Converter
Production
DATA
Figure 2 CLK In and Data CLK Timing
= 4.F
t
del
. If the x2 filter, slow or fast, is selected, then F
DATA
t
sl
DAC
) will then depend on the interpolation filter settings. If no
. Hence the DAC core sampling rate will be between 1.F
DATA
Copyright © 2003-2009 Fujitsu Microelectronics Europe GmbH
DAC
MULIN
= F
). The frequency available at Data CLK,
DAC
), and multiplied by the chosen clock
t
delx
/2. If x4 filtering is selected, then
t
hi
February 2009 Version 2.0
FME/MS/SFDAC1/DS/4250
DAC
DATA
t
lo
= 2.F
). The update
DATA
DATA
. If x4
IN
IN
),
=