STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 13

• Manufacturer Part Number: STEVAL-IFS003V1
• Description: BOARD STLM75/STDS75/ST72F651
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS003V1

• Design Resources: STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
• Sensor Type: Temperature
• Sensing Range: -55°C ~ 125°C
• Interface: I²C
• Voltage - Supply: 7.5 V ~ 19 V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST72F651, STDS75, STLM75
• Silicon Manufacturer: ST Micro
• Silicon Core Number: STLM75/STDS75 And ST72F651AR6
• Kit Application Type: Sensing - Temperature
• Application Sub Type: Temperature Sensor
• Kit Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6238

STLM75
2.4
Note:
Interrupt mode
In interrupt mode, the OS output first becomes active when the measured temperature
exceeds the T
configuration register. Once activated, the OS can only be cleared by either putting the
STLM75 into shutdown mode or by reading from any register (temperature, configuration,
T
when the measured temperature falls below the T
equal to the FT value.
The OS can only be cleared by putting the device into shutdown mode or reading any
register. Thus, this interrupt/clear process is cyclical between the T
T
of the OS/INT pin occur only when the STLM75 is read or placed into shutdown mode.
Otherwise, OS/INT would remain active independently for any event.
Figure 5.
1. These interrupt mode resets of O.S. occur only when STLM75 is read or placed in shutdown. Otherwise,
OS
OS
O.S. would remain active indefinitely for any event.
, or T
, clear, T
HYS
HYS
) on the device. Once the OS has been deactivated, it will only be reactivated
OS output temperature response diagram
OS
, clear, T
value a consecutive number of times as determined by the FT value in the
Figure 5
OS
, clear, T
Doc ID 13296 Rev 12
illustrates typical OS output temperature response.
HYS
, clear, and so forth). These interrupt mode resets
HYS
value a consecutive number of times
OS
and T
HYS
events (i.e.,
Operation
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