STEVAL-IFS003V1 STMicroelectronics, STEVAL-IFS003V1 Datasheet - Page 14

BOARD STLM75/STDS75/ST72F651

STEVAL-IFS003V1

Manufacturer Part Number
STEVAL-IFS003V1
Description
BOARD STLM75/STDS75/ST72F651
Manufacturer
STMicroelectronics

Specifications of STEVAL-IFS003V1

Design Resources
STEVAL-IFS003V1 Gerber Files STEVAL-IFS003V1 Schematic STEVAL-IFS003V1 Bill of Materials
Sensor Type
Temperature
Sensing Range
-55°C ~ 125°C
Interface
I²C
Voltage - Supply
7.5 V ~ 19 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F651, STDS75, STLM75
Silicon Manufacturer
ST Micro
Silicon Core Number
STLM75/STDS75 And ST72F651AR6
Kit Application Type
Sensing - Temperature
Application Sub Type
Temperature Sensor
Kit Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6238
Operation
2.5
Note:
2.6
14/40
Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in
these bits both default to logic '0'.
Table 2.
OS output will be asserted one t
condition remains.
Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STLM75 will go into a low-power standby state. The OS output will
be cleared if the thermostat is operating in Interrupt mode and the OS will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
FT1
0
0
1
1
FT0
0
1
0
1
Fault tolerance setting
STLM75 (consecutive faults)
1
2
4
6
Doc ID 13296 Rev 12
CONV
after fault tolerance is met, provided that the error
Power-up default
Comments
Table
2. At power-up,
STLM75

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