ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 539
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
- ATSAM3U-EK PDF datasheet
- ATSAM3U-EK PDF datasheet #2
- ATSAM3U-EK PDF datasheet #3
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30.7.42
Name:
Address:
Access:
Reset:
For more information on Write Protection Registers, refer to
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
Protects the registers:
• WPKEY: Write Protect KEY
Should be written at value 0x50494F (“PIO” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
•
•
•
•
•
•
•
•
•
•
•
•
•
“PIO Controller PIO Enable Register” on page 518
“PIO Controller PIO Disable Register” on page 518
“PIO Controller Output Enable Register” on page 519
“PIO Controller Output Disable Register” on page 520
“PIO Controller Input Filter Enable Register” on page 521
“PIO Controller Input Filter Disable Register” on page 521
“PIO Multi-driver Enable Register” on page 526
“PIO Multi-driver Disable Register” on page 527
“PIO Pull Up Disable Register” on page 528
“PIO Pull Up Enable Register” on page 528
“PIO Peripheral AB Select Register” on page 529
“PIO Output Write Enable Register” on page 532
“PIO Output Write Disable Register” on page 532
31
23
15
—
7
PIO Write Protect Mode Register
30
22
14
—
PIO_WPMR
0x400E0CE4 (PIOA), 0x400E0EE4 (PIOB), 0x400E10E4 (PIOC)
Read-write
See
6
Table 30-2
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
Section 30.6.1 ”Write Protection
27
19
11
—
3
26
18
10
—
2
Registers”.
SAM3U Series
SAM3U Series
25
17
—
9
1
WPEN
24
16
8
0
539
539
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