R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 198

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 8 Bus Controller (BSC)
Note:
Rev. 2.00 Sep. 16, 2009 Page 168 of 1036
REJ09B0414-0200
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
*
Bit Name
CSXH7
CSXH6
CSXH5
CSXH4
CSXH3
CSXH2
CSXH1
CSXH0
CSXT7
CSXT6
CSXT5
CSXT4
CSXT3
CSXT2
CSXT1
CSXT0
In burst ROM interface, the CSXTn settings are ignored during CPU read accesses.
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
CS and Address Signal Assertion Period Control 1
These bits specify whether or not the Th cycle is to be
inserted (see figure 8.3). When an area for which bit
CSXHn is set to 1 is accessed, one Th cycle, in which
the CSn and address signals are asserted, is inserted
before the normal access cycle.
0: In access to area n, the CSn and address assertion
1: In access to area n, the CSn and address assertion
(n = 7 to 0)
CS and Address Signal Assertion Period Control 2
These bits specify whether or not the Tt cycle is to be
inserted (see figure 8.3). When an area for which bit
CSXTn is set to 1 is accessed, one Tt cycle, in which
the CSn and address signals are retained, is inserted
after the normal access cycle.
0: In access to area n, the CSn and address assertion
1: In access to area n, the CSn and address assertion
(n = 7 to 0)
period (Th) is not extended
period (Th) is extended
period (Tt) is not extended
period (Tt) is extended

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