R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 204

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 8 Bus Controller (BSC)
8.2.8
BCR2 is used for bus arbitration control of the CPU, DMAC, and DTC, and enabling/disabling of
the write data buffer function to the peripheral modules.
Rev. 2.00 Sep. 16, 2009 Page 174 of 1036
REJ09B0414-0200
Bit
7, 6
5
4
3, 2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
IBCCS
PWDBE
Bus Control Register 2 (BCR2)
R
7
0
Initial
Value
All 0
0
0
All 0
1
0
R
6
0
R/W
R
R/W
R/W
R
R/W
R/W
R/W
5
0
Description
Reserved
These are read-only bits and cannot be modified.
Reserved
This bit is always read as 0. The write value should
always be 0.
Internal Bus Cycle Control Select
Selects the internal bus arbiter function.
0: Releases the bus mastership according to the priority
1: Executes the bus cycles alternatively when a CPU
Reserved
These are read-only bits and cannot be modified.
Reserved
This bit is always read as 1. The write value should
always be 1.
Peripheral Module Write Data Buffer Enable
Specifies whether or not to use the write data buffer
function for the peripheral module write cycles.
0: Write data buffer function not used
1: Write data buffer function used
bus mastership request conflicts with a DMAC or
DTC bus mastership request
IBCCS
R/W
4
0
R
3
0
R
2
0
R/W
1
1
PWDBE
R/W
0
0

Related parts for R0K561622S000BE