R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 403

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
10.8
An interrupt request is issued to the CPU when the DTC finishes the specified number of data
transfers or a data transfer for which the DISEL bit was set to 1. In the case of interrupt activation,
the interrupt set as the activation source is generated. These interrupts to the CPU are subject to
CPU mask level and priority level control in the interrupt controller.
10.9
10.9.1
Operation of the DTC can be disabled or enabled using the module stop control register. The
initial setting is for operation of the DTC to be enabled. Register access is disabled by setting the
module stop state. The module stop state cannot be set while the DTC is activated. For details,
refer to section 24, Power-Down Modes.
10.9.2
Transfer information can be located in on-chip RAM. In this case, the RAME bit in SYSCR must
not be cleared to 0.
10.9.3
When the DTC is activated by a DMAC transfer end interrupt, the DTE bit of DMDR is not
controlled by the DTC but its value is modified with the write data regardless of the transfer
counter value and DISEL bit setting. Accordingly, even if the DTC transfer counter value
becomes 0, no interrupt request may be sent to the CPU in some cases.
10.9.4
For DTCE bit setting, use bit manipulation instructions such as BSET and BCLR. If all interrupts
are disabled, multiple activation sources can be set at one time (only at the initial setting) by
writing data after executing a dummy read on the relevant register.
Interrupt Sources
Usage Notes
Module Stop Function Setting
On-Chip RAM
DMAC Transfer End Interrupt
DTCE Bit Setting
Rev. 2.00 Sep. 16, 2009 Page 373 of 1036
Section 10 Data Transfer Controller (DTC)
REJ09B0414-0200

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