R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 786

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 19 ∆Σ A/D Converter
Figure 19.4 shows an example of ∆Σ A/D converter operation (in multi-channel single mode with
channels 0 to 2 selected).
When A/D conversion is performed for two or more channels (multi-channel single mode), the
analog input on each of the selected channels is A/D converted once in sequence from channel 0,
as described below.
1. A/D conversion is started for the selected channels when the ADST bit in DSADCSR is set to
2. When A/D conversion is completed for channel n, the result is transferred to the corresponding
Rev. 2.00 Sep. 16, 2009 Page 756 of 1036
REJ09B0414-0200
Channel 0 (ANDS0)
Channel 1 (ANDS1)
Channel 2 (ANDS2)
Channel 3 (ANDS3)
State of operation
State of operation
State of operation
State of operation
Figure 19.3 Example of ∆Σ A/D Converter Operation (Single Mode for One Channel:
1 by software or by the input of a trigger signal selected by the TRGS1 and TRGS0 bits in
DSADCSR. Execution of A/D conversion is in order of rising channel number, so the order of
precedence starts from channel 0.
∆Σ A/D data register (DSADDRn, n = 0 to 5).
DSADDR0
DSADDR1
DSADDR2
DSADDR3
ADIE
ADST
ADF
Note: *
indicates execution of a software instruction.
Idle
Idle
Idle
Idle
Start A/D
conversion
A/D
Set*
Set*
conversion
1
Channel 1)
Clear*
Idle
A/D
Read the result
conversion result
A/D
Set*
conversion
1
2
Read the result
A/D
conversion result
Clear*
Idle
2

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