R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 938

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 24 Power-Down Modes
24.8
24.8.1
If a SLEEP instruction is executed when the SSBY bit in SBYCR has been set to 1, a transition to
software standby mode is made. In this state, if the DPSBY bit in DPSBYCR is set to 1, a
transition to deep software standby mode is made.
If a software standby mode clearing source (an NMI, or IRQ0 to IRQ15) occurs when a transition
to software standby mode is made, software standby mode will be cleared regardless of the
DPSBY bit setting, and the interrupt exception handling starts after the oscillation settling time for
software standby mode specified by the bits STS4 to STS0 in SBYCR has elapsed.
When both of the SSBY bit in SBYCR and the DPSBY bit in DPSBYCR are set to 1 and no
software standby mode clearing source event occurs, a transition to deep software standby mode
will be made immediately after software standby mode is entered.
In deep software standby mode, the CPU, on-chip peripheral functions, on-chip RAM, and
oscillator functionality are all halted. In addition, the internal power supply to these modules stops,
resulting in a significant reduction in power consumption. At this time, the contents of all the
registers of the CPU, on-chip peripheral functions, and on-chip RAM become undefined.
Contents of the on-chip RAM can be retained when all the bits RAMCUT2 to RAMCUT0 in
DPSBYCR have been cleared to 0. If these bits are set to all 1, the internal power supply to the on-
chip RAM stops and the power consumption is further reduced. At this time, the contents of the
on-chip RAM become undefined.
The I/O ports can be retained in the same state as in software standby mode.
Rev. 2.00 Sep. 16, 2009 Page 908 of 1036
REJ09B0414-0200
Deep Software Standby Mode
Entry to Deep Software Standby Mode