C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 49
C8051F040-TB
Manufacturer Part Number
C8051F040-TB
Description
BOARD PROTOTYPING W/C8051F040
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F040-TB
Contents
Board
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F040
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits7-4:
Bit3:
Bit2:
Bit1:
Bit0:
NOTE:
Bits7-4:
Bits3-0:
Bit7
Bit7
R
R
-
-
UNUSED. Read = 0000b; Write = don’t care
PORT3IC: Port 3 even/odd Pin Input Pair Configuration Bit
0: Port 3 even and odd input channels are independent single-ended inputs
1: Port 3 even and odd input channels are (respectively) +, - difference input pair
HVDA2C: HVDA 2’s Compliment Bit
0: HVDA output measured as an independent single-ended input
1: HVDA result for 2’s compliment value
AIN23IC: AIN0.2, AIN0.3 Input Pair Configuration Bit
0: AIN0.2 and AIN0.3 are independent single-ended inputs
1: AIN0.2, AIN0.3 are (respectively) +, - difference input pair
AIN01IC: AIN0.0, AIN0.1 Input Pair Configuration Bit
0: AIN0.0 and AIN0.1 are independent single-ended inputs
1: AIN0.0, AIN0.1 are (respectively) +, - difference input pair
The ADC0 Data Word is in 2’s complement format for channels configured as difference.
UNUSED. Read = 0000b; Write = don’t care
AMX0AD3-0: AMX0 Address Bits
0000-1111b: ADC Inputs selected per Table 5.1.
Bit6
Bit6
R
R
-
-
SFR Definition 5.2. AMX0SL: AMUX0 Channel Select
SFR Definition 5.1. AMX0CF: AMUX0 Configuration
Bit5
Bit5
R
R
-
-
Bit4
Bit4
R
R
-
-
AMX0AD3 AMX0AD2 AMX0AD1 AMX0AD0 00000000
PORT3IC HVDA2C
Rev. 1.5
R/W
R/W
Bit3
Bit3
C8051F040/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
AIN23IC
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
AIN01IC 00000000
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0xBA
0
0xBB
0
Reset Value
Reset Value
Address:
SFR
49
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