R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 1212

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Index
CSC interface.......................................... 237
D
D/A converter (DAC) ............................. 903
D/A converter characteristics ............... 1152
D/A output hold function in
software standby mode ........................... 908
Data array ....................................... 182, 195
Data array read ....................................... 196
Data array write ...................................... 196
Data format in registers ............................ 24
Data formats in memory ........................... 24
Data transfer instructions.......................... 44
DC characteristics................................. 1108
Dead time compensation ........................ 529
Definitions of A/D conversion
accuracy.................................................. 897
Delayed branch instructions ..................... 27
Denormalized numbers............................. 66
Direct memory access controller
(DMAC) ................................................. 299
Displacement accessing ............................ 29
Divider...................................................... 75
E
Effective address calculation .................... 30
Electrical characteristics ....................... 1107
Equation for getting SCBRR value......... 692
Exception handling ................................... 91
Exception handling state........................... 61
Exception handling vector table ............... 95
Exception source generation immediately
after delayed branch instruction.............. 111
Exceptions triggered by instructions....... 108
External pulse width measurement ......... 528
External trigger input timing .................. 896
Page 1184 of 1190
F
Floating point operation instructions ........ 56
Floating-point ranges ................................ 65
Floating-point registers ............................. 67
Format of double-precision
floating-point number ............................... 63
Format of single-precision
floating-point number ............................... 63
FPU exception........................................... 71
FPU-related CPU instructions................... 58
Full-scale error........................................ 898
G
General illegal instructions ..................... 109
General registers ....................................... 19
Global base register (GBR)....................... 22
H
Halt mode................................................ 860
H-UDI commands................................. 1022
H-UDI interrupt ............................ 133, 1025
H-UDI reset........................................... 1025
H-UDI-related pin timing ..................... 1147
I
I/O port timing ...................................... 1146
I/O ports .................................................. 909
I
I
I
ID Reorder .............................................. 826
IIC3 module timing............................... 1142
Immediate data.......................................... 28
Immediate data accessing ......................... 28
Immediate data format .............................. 25
Initial values of general registers .............. 23
Instruction features ................................... 26
2
2
2
C bus format ......................................... 748
C bus interface 3 (IIC3)........................ 729
C bus interface 3 (IIC3) usage note...... 770
R01UH0026EJ0300 Rev. 3.00
SH7201 Group
Sep 24, 2010