R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 210

• Manufacturer Part Number: R0K572011S000BE
• Description: KIT STARTER FOR SH7201
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572011S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7201
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 8 Cache
(1)
The V bit indicates whether the entry data is valid. When the V bit is 1, data is valid; when 0, data
is not valid.
The U bit (only for operand cache) indicates whether the entry has been written to in write-back
mode. When the U bit is 1, the entry has been written to; when 0, it has not.
The tag address holds the physical address used in the external memory access. It is composed of
21 bits (address bits 31 to 11) used for comparison during cache searches. In this LSI, as values of
addresses in the cache valid space are from H'00000000 to H'1FFFFFFF (see section 9, Bus State
Controller (BSC)), the upper three bits of the tag address are cleared to 0.
The V and U bits are initialized to 0 by a power-on reset and in deep standby mode but not
initialized by a manual reset or in software standby mode.
The tag address is not initialized by a power-on reset or manual reset or in software standby mode.
The tag address becomes undefined after deep standby.
(2)
Holds a 16-byte instruction or data. Entries are registered in the cache in line units (16 bytes).
The data array is not initialized by a power-on reset or manual reset or in software standby mode.
The data array becomes undefined after deep standby.
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Address Array
Data Array
Entry 127
Entry 0
Entry 1
.
.
.
.
.
.
V U
23 (1 + 1 + 21) bits
Address array (ways 0 to 3)
Tag address
Figure 8.1 Operand Cache Structure
127
0
1
.
.
.
.
.
.
LW0
LW0 to LW3: Longword data 0 to 3
LW1
128 (32
Data array (ways 0 to 3)
LW2
4) bits
LW3
R01UH0026EJ0300 Rev. 3.00
127
0
1
.
.
.
.
.
.
LRU
6 bits
SH7201 Group
Sep 24, 2010